Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Introduction to algorithms
MIPS RISC architectures
Hardware logic simulation by compilation
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A comparison of list schedules for parallel processing systems
Communications of the ACM
Field-Programmable Gate Array Technology
Field-Programmable Gate Array Technology
The VERILOG Hardware Description Language
The VERILOG Hardware Description Language
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
The optimization of horizontal microcode within and beyond basic blocks: an application of processor scheduling with resources
Fast hardware-software co-simulation using VHDL models
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Design of embedded systems: formal models, validation, and synthesis
Readings in hardware/software co-design
Approach to the Synthesis of HW and SW in Codesign
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Partitioning of Hardware-Software Embedded Systems: A Metrics-based Approach
Integrated Computer-Aided Engineering
VLSI architecture design approaches for real-time video processing
WSEAS Transactions on Circuits and Systems
ICC'08 Proceedings of the 12th WSEAS international conference on Circuits
Solving partitioning problem in codesign with ant colonies
IWINAC'05 Proceedings of the First international work-conference on the Interplay Between Natural and Artificial Computation conference on Artificial Intelligence and Knowledge Engineering Applications: a bioinspired approach - Volume Part II
Hi-index | 0.00 |
Our approach to digital system simulation compiles a high-level system model into a high-performance simulator that consists of software and hardware components. The target architecture for the simulation compiler is a tightly coupled processor and field-programmable gate array. We describe the simulation compiler and show how it can be used to improve simulation performance by up to a factor of two over an all-software simulator.