Towards a multi-formalism framework for architectural synthesis: the ASAR project

Authors:
M. Auguin;M. Belhadj;J. benzakki;C. Carrière;G. Durrieu;Th. Gautier;M. Israël;P. Le Guernic;M. Lemaître;E. Martin;P. Quinton;L. Rideau;F. Rousseau;O. Sentieys
Affiliations:
I3S;IRISA;LIVE;I3S;CERT-Onera;IRISA-INRIA;LIVE;IRISA-INRIA;CERT-Onera;LISTI;IRISA-CNRS;INRIA-Sophia;LIVE;LASTI
Venue:
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Year:
1994

Citing 12
Cited 1

Centaur: the system

SDE 3 Proceedings of the third ACM SIGSOFT/SIGPLAN software engineering symposium on Practical software development environments
A distributed architecture for programming environments

SDE 4 Proceedings of the fourth ACM SIGSOFT symposium on Software development environments
High-level synthesis: introduction to chip and system design

High-level synthesis: introduction to chip and system design
The ALPHA language and its use for the design of systolic arrays

Journal of VLSI Signal Processing Systems - Special issue: algorithms and parallel VSLI architecture
Real theorem provers deserve real user-interfaces

SDE 5 Proceedings of the fifth ACM SIGSOFT symposium on Software development environments
Computability of recurrence equations

Theoretical Computer Science
Codesign from Cospecification

Computer
Program Implementation Schemes for Hardware-Software Systems

Computer
Synchronous Programming of Reactive Systems

Synchronous Programming of Reactive Systems
Hardware-Software Cosynthesis for Digital Systems

IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers

IEEE Design & Test
System synthesis via hardware-software co-design

System synthesis via hardware-software co-design

GC: the data-flow graph format of synchronous programming

IR '95 Papers from the 1995 ACM SIGPLAN workshop on Intermediate representations

Quantified Score

Hi-index	0.00

Visualization

Abstract

This paper describes a research project - named ASAR - grouping together six french research teams, oriented towards architectural and system synthesis. A main concern of this project is hardware/software codesign and user interface management.