Synthesis and simulation of digital systems containing interacting hardware and software components
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
A model for system-level timed analysis and profiling
Proceedings of the conference on Design, automation and test in Europe
Synthesis and simulation of digital systems containing interacting hardware and software components
Readings in hardware/software co-design
Generative Development System for FPGA Processors with Active Components
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Thread-based software synthesis for embedded system design
EDTC '96 Proceedings of the 1996 European conference on Design and Test
PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
A Flexible Model for Evaluating the Behavior of Hardware/Software Systems
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Aspects of system modelling in Hardware/Software partitioning
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
A consistent labeling approach to hardware software partitioning
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Towards a multi-formalism framework for architectural synthesis: the ASAR project
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Dual Flow Nets: Modeling the control/data-flow relation in embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
A system level implementation strategy and partitioning heuristic for LUT-based applications
Computers and Electrical Engineering
SEAL'06 Proceedings of the 6th international conference on Simulated Evolution And Learning
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Synthesis of circuits containing application-specific as well as re-programmable components such as off-the-shelf microprocessors provides a promising approach to realization of complex systems using a minimal amount of application-specific hardware while still meeting the required performance constraints. We formulate the synthesis problem of complex behavioral descriptions with performance constraints as a hardware-software co-design problem. The target system architecture consists of a software component as a program running on a re-programmable processor assisted by application-specific hardware components. System synthesis is performed by first partitioning the input system description into hardware and software portions and then by implementing each of them separately. We consider the problem of identifying potential hardware and software components of a system described in a high-level modeling language. Partitioning approaches are presented based on decoupling of data and control flow, and based on communication/synchronization requirements of the resulting system design. Synchronization between various elements of a mixed system design is one of the key issues that any synthesis system must address. We present software and interface synchronization schemes that facilitate communication between system components. We explore the relationship between the non-determinism in the system models and the associated synchronization schemes needed in system implementations. The synthesis of dedicated hardware is achieved by hardware synthesis tools, while the software component is generated using software compiling techniques. We present tools to perform synthesis of a system description into hardware and software components. The resulting software component is assumed to be implemented for the DLX machine, a load/store microprocessor. We present design of an ethernet based network coprocessor to demonstrate the feasibility of mixed system synthesis.