Sequencing run-time reconfigured hardware with software
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
The Space Requirements of Indexing Under Perspective Projections
IEEE Transactions on Pattern Analysis and Machine Intelligence
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
System synthesis via hardware-software co-design
System synthesis via hardware-software co-design
Architectural partitioning for system level synthesis of integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Partitioning an application among interacting hardware and software components is an important part of system design. In this paper, we introduce a new implementation strategy and partitioning heuristic, well adapted to applications that are composed of functions that can either be implemented in software or in hardware as lookup tables (LUT). Simulation results are presented to show the performance and speedup that the method can achieve.