Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Reasoning About Time in Higher-Level Language Software
IEEE Transactions on Software Engineering
Calculating the maximum, execution time of real-time programs
Real-Time Systems
A model for estimating trace-sample miss ratios
SIGMETRICS '91 Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems
A data locality optimizing algorithm
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Predicting execution time on contemporary computer architectures
Predicting execution time on contemporary computer architectures
Design and evaluation of a compiler algorithm for prefetching
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
Predicting deterministic execution times of real-time programs
Predicting deterministic execution times of real-time programs
Pipelined processors and worst case execution times
Real-Time Systems
Cache miss equations: an analytical representation of cache misses
ICS '97 Proceedings of the 11th international conference on Supercomputing
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Efficient Scheduling Algorithms for Real-Time Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Worst case timing analysis of RISC processors: R3000/R3010 case study
RTSS '95 Proceedings of the 16th IEEE Real-Time Systems Symposium
Efficient microarchitecture modeling and path analysis for real-time software
RTSS '95 Proceedings of the 16th IEEE Real-Time Systems Symposium
Integrating the timing analysis of pipelining and instruction caching
RTSS '95 Proceedings of the 16th IEEE Real-Time Systems Symposium
Analysis of cache-related preemption delay in fixed-priority preemptive scheduling
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Cache modeling for real-time software: beyond direct mapped instruction caches
RTSS '96 Proceedings of the 17th IEEE Real-Time Systems Symposium
Predicting Worst Case Execution Times on a Pipelined RISC Processor
Predicting Worst Case Execution Times on a Pipelined RISC Processor
Rate derivation and its applications to reactive, real-time embedded systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
A case study on modeling shared memory access effects during performance analysis of HW/SW systems
Proceedings of the 6th international workshop on Hardware/software codesign
A compilation-based software estimation scheme for hardware/software co-simulation
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Synthesis of Application Specific Instructions for Embedded DSP Software
IEEE Transactions on Computers
Rapid development of optimized DSP code from a high level description through software estimations
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Software performance estimation strategies in a system-level design tool
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Fast performance analysis of bus-based system-on-chip communication architectures
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Probabilistic application modeling for system-level perfromance analysis
Proceedings of the conference on Design, automation and test in Europe
Reliable estimation of execution time of embedded software
Proceedings of the conference on Design, automation and test in Europe
Computer Aided Design of Fault-Tolerant Application Specific Programmable Processors
IEEE Transactions on Computers
Source-level execution time estimation of C programs
Proceedings of the ninth international symposium on Hardware/software codesign
System-level power/performance analysis for embedded systems design
Proceedings of the 38th annual Design Automation Conference
Modeling assembly instruction timing in superscalar architectures
Proceedings of the 15th international symposium on System Synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Energy Metric for Software Systems
Software Quality Control
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-chip
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
System-Level Performance Analysis in SystemC
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Asynchronous software thread integration for efficient software
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
A Time Slice Based Scheduler Model for System Level Design
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An Esterel processor with full preemption support and its worst case reaction time analysis
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
System-level performance/power analysis for platform-based design of multimedia applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Probabilistic design of multimedia embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Worst Case Reaction Time Analysis of Concurrent Reactive Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
Compilation and worst-case reaction time analysis for multithreaded Esterel processing
EURASIP Journal on Embedded Systems - Model-driven high-level programming of embedded systems: selected papers from SLA++P'07 and SLA++P'08
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Development of a high-level simulation approach and its application to multicore video decoding
IEEE Transactions on Circuits and Systems for Video Technology
Embedded system's performance analysis with RTC and QT
APPT'07 Proceedings of the 7th international conference on Advanced parallel processing technologies
Parametric timing analysis and its application to dynamic voltage scaling
ACM Transactions on Embedded Computing Systems (TECS)
Evaluation of data-parallel H.264 decoding approaches for strongly resource-restricted architectures
Multimedia Tools and Applications
Embedded Systems Design
Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
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This paper examines the problem of statically analyzing the performance of embedded software. This problem is motivated by the increasing growth of embedded systems and a lack of appropriate analysis tools.We study different performance metrics that need tobe considered in this context and examine a range oftechniques that have been proposed for analysis. Verybroadly these can be classified into path analysis andsystem utilization analysis techniques. It is observedthat these are interdependent, and thus need to beconsidered together in any analysis framework.