Performance estimation for task graphs combining sequential path profiling and control dependence regions

  • Authors:

  • Fabrizio Ferrandi;Marco Lattuada;Christian Pilato;Antonino Tumeo

  • Affiliations:

  • Politecnico di Milano, Dipartimento di Elettronica e Informazine, Milano, Italy;Politecnico di Milano, Dipartimento di Elettronica e Informazine, Milano, Italy;Politecnico di Milano, Dipartimento di Elettronica e Informazine, Milano, Italy;Politecnico di Milano, Dipartimento di Elettronica e Informazine, Milano, Italy

  • Venue:
  • MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
  • Year:
  • 2009

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Abstract

The speed-up estimation of parallelized code is crucial to efficiently compare different parallelization techniques or task graph transformations. Unfortunately, most of the time, during the parallelization of a specification, the information that can be extracted by profiling the corresponding sequential code (e.g. the most executed paths) are not properly taken into account. In particular, correlating sequential path profiling with the corresponding parallelized code can help in the identification of code hot spots, opening new possibilities for automatic parallelization. For this reason, starting from a well-known profiling technique, the Efficient Path Profiling, we propose a methodology that estimates the speed-up of a parallelized specification, just using the corresponding hierarchical task graph representation and the information coming from the dynamic profiling of the initial sequential specification. Experimental results show that the proposed solution outperforms existing approaches.