Calculating the maximum, execution time of real-time programs
Real-Time Systems
A methodology for solving Markov models of parallel systems
Journal of Parallel and Distributed Computing
Predicting deterministic execution times of real-time programs
Predicting deterministic execution times of real-time programs
Performance estimation of embedded software with instruction cache modeling
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Efficient software performance estimation methods for hardware/software codesign
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Static timing analysis of embedded software
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
A tool for performance estimation of networked embedded end-systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
Efficient descriptor-vector multiplications in stochastic automata networks
Journal of the ACM (JACM)
Rate analysis for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A probabilistic performance metric for real-time system design
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Cycle-accurate simulation of energy consumption in embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Heterogeneous modeling and simulation of embedded systems in El Greco
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Surviving the SOC revolution: a guide to platform-based design
Surviving the SOC revolution: a guide to platform-based design
Schedulability-driven performance analysis of multiple mode embedded real-time systems
Proceedings of the 37th Annual Design Automation Conference
Probabilistic application modeling for system-level perfromance analysis
Proceedings of the conference on Design, automation and test in Europe
System-level power/performance analysis for embedded systems design
Proceedings of the 38th annual Design Automation Conference
Communication and Concurrency
Probability and Statistics with Reliability, Queuing and Computer Science Applications
Probability and Statistics with Reliability, Queuing and Computer Science Applications
Petri Net Theory and the Modeling of Systems
Petri Net Theory and the Modeling of Systems
Co-Synthesis of Hardware and Software for Digital Embedded Systems
Co-Synthesis of Hardware and Software for Digital Embedded Systems
Modeling, Verification, and Exploration of Task-Level Concurrency of Real-Time Embedded Systems
Modeling, Verification, and Exploration of Task-Level Concurrency of Real-Time Embedded Systems
Self-Similar Network Traffic and Performance Evaluation
Self-Similar Network Traffic and Performance Evaluation
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems
IEEE Transactions on Computers
Performance estimation for real-time distributed embedded systems
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Automatic trace analysis for logic of constraints
Proceedings of the 40th annual Design Automation Conference
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
System Design: Traditional Concepts and New Paradigms
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
On-chip traffic modeling and synthesis for MPEG-2 video applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Rate analysis for streaming applications with on-chip buffer constraints
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Schedulability analysis of applications with stochastic task execution times
ACM Transactions on Embedded Computing Systems (TECS)
Approximate VCCs: a new characterization of multimedia workloads for system-level MpSoC design
Proceedings of the 42nd annual Design Automation Conference
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A performance-oriented hardware/software partitioning for datapath applications
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Thermal analysis of multiprocessor SoC applications by simulation and verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On buffering with stochastic guarantees in resource-constrained media players
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
Mapping on multi/many-core systems: survey of current and emerging trends
Proceedings of the 50th Annual Design Automation Conference
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The objective of this article is to introduce the use of Stochastic Automata Networks (SANs) as an effective formalism for application-architecture modeling in system-level average-case analysis for platform-based design. By platform, we mean a family of heterogeneous architectures that satisfy a set of architectural constraints imposed to allow re-use of hardware and software components. More precisely, we show how SANs can be used early in the design cycle to identify the best performance/power trade-offs among several application-architecture combinations. Having this information available not only helps avoid lengthy simulations for predicting power and performance figures, but also enables efficient mapping of different applications onto a chosen platform. We illustrate the benefits of our methodology by using the “Picture-in-Picture” video decoder as a driver application.