A Formal Approach to MpSoC Performance Verification

  • Authors:
  • Kai Richter;Marek Jersak;Rolf Ernst

  • Affiliations:
  • -;-;-

  • Venue:
  • Computer
  • Year:
  • 2003

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Abstract

Multiprocessor system on chip designs use complex on-chip networks to integrate different programmable processor cores, specialized memories, and other components on a single chip.MpSoCs have become the architecture of choice in many industries. Their heterogeneity inevitably increases with intellectual-property integration and component specialization. System integration is becoming a major challenge in their design.Simulation is state of the art in MpSoC performance verification, but it has conceptual disadvantages that become disabling as complexity increases. Formal approaches offer a systematic alternative.