Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
Holistic schedulability analysis for distributed hard real-time systems
Microprocessing and Microprogramming - Parallel processing in embedded real-time systems
Formal verification of an IBM CoreConnect processor local bus arbiter core
Proceedings of the 37th Annual Design Automation Conference
NuSMV 2: An OpenSource Tool for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Timed Automata as Task Models for Event-Driven Systems
RTCSA '99 Proceedings of the Sixth International Conference on Real-Time Computing Systems and Applications
Extending the transaction level modeling approach for fast communication architecture exploration
Proceedings of the 41st annual Design Automation Conference
Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Computer
Spin model checker, the: primer and reference manual
Spin model checker, the: primer and reference manual
Verification of AMBA Using a Combination of Model Checking and Theorem Proving
Electronic Notes in Theoretical Computer Science (ENTCS)
A scalable embedded JPEG2000 architecture
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
High performance scalable image compression with EBCOT
IEEE Transactions on Image Processing
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Real-time analysis of resource-constrained distributed systems by simulation-guided model checking
ACM SIGBED Review - Special issue on the RTSS forum on deeply embedded real-time computing
A cycle-count-accurate simulation platform with enhanced design exploration capability
Proceedings of the 5th International ICST Conference on Simulation Tools and Techniques
Embedded RAIDs-on-chip for bus-based chip-multiprocessors
ACM Transactions on Embedded Computing Systems (TECS)
Hi-index | 0.00 |
The ARM Advanced Microcontroller Bus Architecture (AMBA) is a widely used interconnection standard for SoC design. In order to support high-speed pipelined data transfers, AMBA supports a rich set of bus signals, making the analysis of AMBA-based embedded systems a challenging proposition. This paper makes two main contributions to the analysis and evaluation of AMBA-based SoC designs. The first contribution is to provide a method for the performance analysis and evaluation of AMBA-based SoC designs using formal models. This method provides a way to obtain the end-to-end execution bounds of AMBA-based SoC designs, and guarantees the correctness of the results. The second contribution is to use these formal models to prove the functional correctness of the SoC designs. Using our formal models, we were able to uncover an ambiguous case in the AMBA specification that can lead to deadlocks. This case has not been previously documented by methods focused on AMBA protocol verification. Finally, we validate the proposed performance analysis approach by comparing results with a SystemC implementation of a digital camera case study.