Holistic schedulability analysis for distributed hard real-time systems
Microprocessing and Microprogramming - Parallel processing in embedded real-time systems
Performance Estimation for Real-Time Distributed Embedded Systems
IEEE Transactions on Parallel and Distributed Systems
Exploiting Precedence Relations in the Schedulability Analysis of Distributed Real-Time Systems
RTSS '99 Proceedings of the 20th IEEE Real-Time Systems Symposium
Performance estimation of distributed real-time embedded systems by discrete event simulations
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
Timed automata based analysis of embedded system architectures
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems
RTSS '12 Proceedings of the 2012 IEEE 33rd Real-Time Systems Symposium
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In this paper, we propose a novel analytical method, called scheduling time bound analysis, to find a tight upper bound of the worst-case response time in a distributed real-time embedded system, considering execution time variations of tasks, jitter of input arrivals, and scheduling anomaly behavior in a multi-tasking system all together. By analyzing the graph topology and worst-case scheduling scenarios, we measure the conservative scheduling time bound of each task. The proposed method supports an arbitrary mixture of preemptive and non-preemptive processing elements. Its speed is comparable to compositional approaches while it gives a much tighter bound. The advantages of the proposed approach compared with related work were verified by experimental results with randomly generated task graphs and a real-life automotive application.