Analyzing the behavior and performance of parallel programs
Analyzing the behavior and performance of parallel programs
Static performance prediction of data-dependent programs
Proceedings of the 2nd international workshop on Software and performance
IEEE Transactions on Software Engineering
Symbolic Performance Modeling of Parallel Systems
IEEE Transactions on Parallel and Distributed Systems
A framework for performance modeling and prediction
Proceedings of the 2002 ACM/IEEE conference on Supercomputing
Compilation-based software performance estimation for system level design
HLDVT '00 Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00)
Analyzing On-Chip Communication in a MPSoC Environment
Proceedings of the conference on Design, automation and test in Europe - Volume 2
The future of multiprocessor systems-on-chips
Proceedings of the 41st annual Design Automation Conference
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
IEEE Transactions on Computers
ARTS: A System-Level Framework for Modeling MPSoC Components and Analysis of their Causality
MASCOTS '05 Proceedings of the 13th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
Introduction to the cell multiprocessor
IBM Journal of Research and Development - POWER5 and packaging
Supporting reconfigurable parallel multimedia applications
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
SP@CE: an SP-based programming model for consumer electronics streaming applications
LCPC'06 Proceedings of the 19th international conference on Languages and compilers for parallel computing
Service based communication for MPSoC platform-SegBus
Microprocessors & Microsystems
Supporting reconfigurable parallel multimedia applications
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
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In the past, research on Multiprocessor Systems-on-Chip (MPSoC) has focused mainly on increasing the available processing power on a chip, while less effort was put into specific system-level performance analysis, or into behavior prediction. This paper introduces PAM-SoC, a light-weight performance predictor for MPSoC system-level performance. Being based on Pamela, a static performance predictor for parallel applications, PAM-SoC can compute its prediction in seconds for cases when cycle-accurate simulation takes tens of minutes. The paper includes a set of PAM-SoC validation experiments, as well as two sets of experiments to show how PAM-SoC can be used for either application tuning or MPSoC platform tuning in early system design phases.