Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Waiting Time Distributions for Processor-Sharing Systems
Journal of the ACM (JACM)
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Multiprocessor mapping of process networks: a JPEG decoding case study
Proceedings of the 15th international symposium on System Synthesis
Managing dynamic concurrent tasks in embedded real-time multimedia systems
Proceedings of the 15th international symposium on System Synthesis
Synthesis of Embedded Software from Synchronous Dataflow Specifications
Journal of VLSI Signal Processing Systems
System Design Using Kahn Process Networks: The Compaan/Laura Approach
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Experimental analysis of the fastest optimum cycle ratio and mean algorithms
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Schedulability analysis of applications with stochastic task execution times
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 43rd annual Design Automation Conference
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Throughput Analysis of Synchronous Data Flow Graphs
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Function level parallelism driven by data dependencies
ACM SIGARCH Computer Architecture News
Probabilistic design of multimedia embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 44th annual Design Automation Conference
SPRINT: a tool to generate concurrent transaction-level models from sequential code
EURASIP Journal on Applied Signal Processing
Software/Hardware Engineering with the Parallel Object-Oriented Specification Language
MEMOCODE '07 Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign
The worst-case execution-time problem—overview of methods and survey of tools
ACM Transactions on Embedded Computing Systems (TECS)
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Analyzing composability of applications on MPSoC platforms
Journal of Systems Architecture: the EUROMICRO Journal
Parametric throughput analysis of synchronous data flow graphs
Proceedings of the conference on Design, automation and test in Europe
Auto-design systematic methodology of cluster MPSoC for multiple concurrent applications
International Journal of Computer Applications in Technology
Energy-aware task mapping and scheduling for reliable embedded computing systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
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Modern embedded devices are increasingly becoming multiprocessor with the need to support a large number of applications to satisfy the demands of users. Due to a huge number of possible combinations of these multiple applications, it becomes a challenge to predict their performance. This becomes even more important when applications may be dynamically started and stopped in the system. Since modern embedded systems allow users to download and add applications at run-time, a complete design-time analysis is not always possible. This paper presents a new technique to accurately predict the performance of multiple applications mapped on a multiprocessor platform. Iterative probabilistic analysis is used to estimate the time spent by tasks during their contention phase, and thereby predicting the performance of applications. The approach is scalable with the number of applications and processors in the system. As compared to earlier techniques, this approach is much faster and scalable, while still improving the accuracy. The analysis takes 300µs on a 500 MHz processor for ten applications. Since multimedia applications are increasingly becoming more dynamic, results of a case-study with applications with varying execution times are also presented. In addition, results of a casestudy with real applications executing on a field-programmable gate array multiprocessor platform are shown.