Proceedings of the 43rd annual Design Automation Conference
Proceedings of the 44th annual Design Automation Conference
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Analyzing composability of applications on MPSoC platforms
Journal of Systems Architecture: the EUROMICRO Journal
Journal of Systems Architecture: the EUROMICRO Journal
Multithreaded simulation for synchronous dataflow graphs
Proceedings of the 45th annual Design Automation Conference
Parametric throughput analysis of synchronous data flow graphs
Proceedings of the conference on Design, automation and test in Europe
Formal Modeling and Scheduling of Datapaths of Digital Document Printers
FORMATS '08 Proceedings of the 6th international conference on Formal Modeling and Analysis of Timed Systems
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Methods for power optimization in SOC-based data flow systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Throughput Constraint for Synchronous Data Flow Graphs
CPAIOR '09 Proceedings of the 6th International Conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems
Reduction techniques for synchronous dataflow graphs
Proceedings of the 46th Annual Design Automation Conference
Manycore performance analysis using timed configuration graphs
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Iterative probabilistic performance prediction for multi-application multiprocessor systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A tag machine based performance evaluation method for job-shop schedules
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Run-time spatial resource management for real-time applications on heterogeneous MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
Automated bottleneck-driven design-space exploration of media processing systems
Proceedings of the Conference on Design, Automation and Test in Europe
Worst-case performance analysis of synchronous dataflow scenarios
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Synchronous dataflow scenarios
ACM Transactions on Embedded Computing Systems (TECS)
Verification of printer datapaths using timed automata
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part II
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Multithreaded Simulation for Synchronous Dataflow Graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Precedence constraint posting for cyclic scheduling problems
CPAIOR'11 Proceedings of the 8th international conference on Integration of AI and OR techniques in constraint programming for combinatorial optimization problems
A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Performance model checking scenario-aware dataflow
FORMATS'11 Proceedings of the 9th international conference on Formal modeling and analysis of timed systems
Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware
Journal of Signal Processing Systems
Step coverability algorithms for communicating systems
Science of Computer Programming
CLASSY: a clock analysis system for rapid prototyping of embedded applications on MPSoCs
Proceedings of the 15th International Workshop on Software and Compilers for Embedded Systems
Worst-case throughput analysis of real-time dynamic streaming applications
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
High-performance and low-energy buffer mapping method for multiprocessor DSP systems
ACM Transactions on Embedded Computing Systems (TECS)
Dataflow analysis for multiprocessor systems with non-starvation-free schedulers
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Mathematical formalisms for performance evaluation of networks-on-chip
ACM Computing Surveys (CSUR)
Liveness evaluation of a cyclo-static DataFlow graph
Proceedings of the 50th Annual Design Automation Conference
Proceedings of the 50th Annual Design Automation Conference
Process-variation-aware mapping of best-effort and real-time streaming applications to MPSoCs
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
Model checking of scenario-aware dataflow with CADP
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Modeling static-order schedules in synchronous dataflow graphs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
CADSE: communication aware design space exploration for efficient run-time MPSoC management
Frontiers of Computer Science: Selected Publications from Chinese Universities
Maximum-throughput mapping of SDFGs on multi-core SoC platforms
Journal of Parallel and Distributed Computing
Energy-aware task mapping and scheduling for reliable embedded computing systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
Failure-Aware Task Scheduling of Synchronous Data Flow Graphs Under Real-Time Constraints
Journal of Signal Processing Systems
Journal of Systems Architecture: the EUROMICRO Journal
Hi-index | 0.00 |
Synchronous Data Flow Graphs (SDFGs) are a useful tool for modeling and analyzing embedded data flow applications, both in a single processor and a multiprocessing context or for application mapping on platforms. Throughput analysis of these SDFGs is an important step for verifying throughput requirements of concurrent real-time applications, for instance within design-space exploration activities. Analysis of SDFGs can be hard, since the worst-case complexity of analysis algorithms is often high. This is also true for throughput analysis. In particular, many algorithms involve a conversion to another kind of data flow graph, the size of which can be exponentially larger than the size of the original graph. In this paper, we present a method for throughput analysis of SDFGs, based on explicit state-space exploration and we show that the method, despite its worst-case complexity, works well in practice, while existing methods often fail. We demonstrate this by comparing the method with state-ofthe- art cycle mean computation algorithms. Moreover, since the state-space exploration method is essentially the same as simulation of the graph, the results of this paper can be easily obtained as a byproduct in existing simulation tools.