Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Determining the minimum iteration period of an algorithm
Journal of VLSI Signal Processing Systems
Determining the Order of Processor Transactions in StaticallyScheduled Multiprocessors
Journal of VLSI Signal Processing Systems
Software Synthesis from Dataflow Graphs
Software Synthesis from Dataflow Graphs
Embedded Multiprocessors: Scheduling and Synchronization
Embedded Multiprocessors: Scheduling and Synchronization
Multiprocessor Resource Allocation for Hard-Real-Time Streaming with a Dynamic Job-Mix
RTAS '05 Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Throughput Analysis of Synchronous Data Flow Graphs
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Roundtable: Envisioning the Future for Multiprocessor SoC
IEEE Design & Test
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Nomadik®: AMobile Multimedia Application Processor Platform
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
From precedence constraint posting to partial order schedules: A CSP approach to Robust Scheduling
AI Communications - Constraint Programming for Planning and Scheduling
Faster maximum and minimum mean cycle algorithms for system-performance analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the Conference on Design, Automation and Test in Europe
A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
Process-variation-aware mapping of best-effort and real-time streaming applications to MPSoCs
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
Modeling static-order schedules in synchronous dataflow graphs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
CADSE: communication aware design space exploration for efficient run-time MPSoC management
Frontiers of Computer Science: Selected Publications from Chinese Universities
Maximum-throughput mapping of SDFGs on multi-core SoC platforms
Journal of Parallel and Distributed Computing
Flexible filters in stream programs
ACM Transactions on Embedded Computing Systems (TECS)
The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
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Stream (data-flow) computing is considered an effective para-digm for parallel programming of high-end multi-core architectures for embedded applications (networking, multimedia, wireless communication). Our work addresses a key step in stream programming for embedded multicores, namely, the efficient mapping of a synchronous data-flow graph (SDFG) onto a multi-core platform subject to a minimum throughput requirement. This problem has been extensively studied in the past, and its complexity has lead researches to develop incomplete algorithms which cannot exclude false negatives. We developed a CP-based complete algorithm based on a new throughput-bounding constraint. The algorithm has been tested on a number of non-trivial SDFG mapping problems with promising results.