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Formal Methods in System Design
3D exploration of software schedules for DSP algorithms
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Proceedings of the 37th Annual Design Automation Conference
Multidimensional Exploration of Software Implementationsfor DSP Algorithms
Journal of VLSI Signal Processing Systems - Special issue on recent advances in the design and implementation of signal processing systems
Shared memory implementations of synchronous dataflow specifications
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Reconfigurable synchronized dataflow processor
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
System canvas: a new design environment for embedded DSP and telecommunication systems
Proceedings of the ninth international symposium on Hardware/software codesign
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FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Design of embedded systems: formal models, validation, and synthesis
Readings in hardware/software co-design
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IEEE Design & Test
Functional and Performance Modeling of Concurrency in VCC
Concurrency and Hardware Design, Advances in Petri Nets
StreamIt: A Language for Streaming Applications
CC '02 Proceedings of the 11th International Conference on Compiler Construction
The Implementation of Synchronous Dataflow Graphs Using Reconfigurable Hardware
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Tutorial: Compiling concurrent languages for sequential processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Optimized software synthesis for synchronous dataflow
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The Processing Graph Method Tool (PGMT)
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
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Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor
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ACM Computing Surveys (CSUR)
The CBP Parameter: A Module Characterization Approach for DSP Software Optimization
Journal of VLSI Signal Processing Systems
Multithreaded Synchronous Data Flow Simulation
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Minimising buffer requirements of synchronous dataflow graphs with model checking
Proceedings of the 42nd annual Design Automation Conference
Cache aware optimization of stream programs
LCTES '05 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
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CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Multidimensional DSP Core Synthesis for FPGA
Journal of VLSI Signal Processing Systems
Analysis of Dataflow Programs with Interval-limited Data-rates
Journal of VLSI Signal Processing Systems
Truly heterogeneous modeling with systemC
Formal methods and models for system design
Software synthesis from the dataflow interchange format
SCOPES '05 Proceedings of the 2005 workshop on Software and compilers for embedded systems
Efficient simulation of critical synchronous dataflow graphs
Proceedings of the 43rd annual Design Automation Conference
Proceedings of the 43rd annual Design Automation Conference
Language and compiler design for streaming applications
International Journal of Parallel Programming - Special issue: The next generation software program
Modeling real-world control systems: beyond hybrid systems
WSC '04 Proceedings of the 36th conference on Winter simulation
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
Beyond single-appearance schedules: Efficient DSP software synthesis using nested procedure calls
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Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms
Journal of Systems Architecture: the EUROMICRO Journal
Efficient simulation of critical synchronous dataflow graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
How rapid is rapid prototyping? analysis of ESPADON programme results
EURASIP Journal on Applied Signal Processing
A SystemC-based design methodology for digital signal processing systems
EURASIP Journal on Embedded Systems
EURASIP Journal on Applied Signal Processing
Buffer optimization and dispatching scheme for embedded systems with behavioral transparency
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications
Journal of Embedded Computing - Issues in embedded single-chip multicore architectures
Memory-constrained block processing for DSP software optimization
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Multithreaded simulation for synchronous dataflow graphs
Proceedings of the 45th annual Design Automation Conference
Liquid Metal: Object-Oriented Programming Across the Hardware/Software Boundary
ECOOP '08 Proceedings of the 22nd European conference on Object-Oriented Programming
Intml: A dataflow oriented development system for virtual reality applications
Presence: Teleoperators and Virtual Environments
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Throughput Constraint for Synchronous Data Flow Graphs
CPAIOR '09 Proceedings of the 6th International Conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems
Mapping stream programs onto heterogeneous multiprocessor systems
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
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Reduction techniques for synchronous dataflow graphs
Proceedings of the 46th Annual Design Automation Conference
Mode grouping for more effective generalized scheduling of dynamic dataflow applications
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Serialized parallel code generation framework for MPSoC
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Look into details: the benefits of fine-grain streaming buffer analysis
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Communication-aware task assignment algorithm for MPSoC using shared memory
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Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures
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A fast heuristic scheduling algorithm for periodic ConcurrenC models
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Orchestration by approximation: mapping stream programs onto multicore architectures
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Multithreaded Simulation for Synchronous Dataflow Graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Correct and non-defensive glue design using abstract models
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Topological Patterns for Scalable Representation and Analysis of Dataflow Graphs
Journal of Signal Processing Systems
Rapid implementation and optimisation of DSP systems on SoPC heterogeneous platforms
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Synchroscalar: initial lessons in power-aware design of a tile-based embedded architecture
PACS'03 Proceedings of the Third international conference on Power - Aware Computer Systems
Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware
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Energy-driven partitioning of signal processing algorithms in sensor networks
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Behavioral types for embedded software: a survey
Component-Based Software Development for Embedded Systems
Postscheduling buffer management trade-offs in streaming software synthesis
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FORMLESS: scalable utilization of embedded manycores in streaming applications
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Profile-guided deployment of stream programs on multicores
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StreamPI: a stream-parallel programming extension for object-oriented programming languages
The Journal of Supercomputing
Buffer Optimization and Dispatching Scheme for Embedded Systems with Behavioral Transparency
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DART--a High Level Software-Defined Radio Platform Model for Developing the Run-Time Controller
Journal of Signal Processing Systems
Communication-aware Heterogeneous Multiprocessor Mapping for Real-time Streaming Systems
Journal of Signal Processing Systems
Port Based Actor Model with Kahn Process Network Model and Decidable Dataflow Model
Journal of Signal Processing Systems
Compositionality in synchronous data flow: Modular code generation from hierarchical SDF graphs
ACM Transactions on Embedded Computing Systems (TECS)
A general constraint-centric scheduling framework for spatial architectures
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SPDF: a schedulable parametric data-flow MoC
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Modeling static-order schedules in synchronous dataflow graphs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Maximum-throughput mapping of SDFGs on multi-core SoC platforms
Journal of Parallel and Distributed Computing
Throughput-memory footprint trade-off in synthesis of streaming software on embedded multiprocessors
ACM Transactions on Embedded Computing Systems (TECS)
Combining computation and communication optimizations in system synthesis for streaming applications
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Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
BPDF: a statically analyzable DataFlow model with integer and Boolean parameters
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Optimizing the implementation of real-time Simulink models onto distributed automotive architectures
Journal of Systems Architecture: the EUROMICRO Journal
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From the Publisher:Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real-time systems. Software Synthesis from Dataflow Graphs reviews the state-of-the-art in constructing static, memory-optimal schedules for programs expressed as SDF graphs. Code size reduction is obtained by the careful organization of loops in the target code. Data buffering is optimized by constructing the loop hierarchy in provably optimal ways for many classes of SDF graphs. The central result is a uniprocessor scheduling framework that provably synthesizes the most compact looping structures, called single appearance schedules, for a certain class of SDF graphs. In addition, algorithms and heuristics are presented that generate single appearance schedules optimized for data buffering usage. Numerous practical examples and extensive experimental data are provided to illustrate the efficacy of these techniques.