Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Compiling SpecC for simulation
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
System Design with SystemC
Software Synthesis from Dataflow Graphs
Software Synthesis from Dataflow Graphs
Proceedings of the conference on Design, automation and test in Europe
SystemC Kernel Extensions For Heterogenous System Modeling: A Framework for Multi-MoC Modeling & Simulation
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs
IEEE Transactions on Computers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Embedded system design usually starts from an executable specification model described in a C-based System Level Description Language (SLDL), such as SystemC or SpecC. In this paper, we identify a subset of well-defined C-based design models, called periodic ConcurrenC models, that can be statically scheduled, resulting in significant higher simulation and execution speed. We propose a novel heuristic scheduling algorithm that not only is faster than classic matrix-based synchronous dataflow (SDF) scheduling approaches, but also reduces the model execution time by an order of magnitude over the default discrete event simulation.