Reduction techniques for synchronous dataflow graphs
Proceedings of the 46th Annual Design Automation Conference
Look into details: the benefits of fine-grain streaming buffer analysis
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
Bandwidth Allocation for Iterative Data-Dependent E-science Applications
CCGRID '10 Proceedings of the 2010 10th IEEE/ACM International Conference on Cluster, Cloud and Grid Computing
Automated bottleneck-driven design-space exploration of media processing systems
Proceedings of the Conference on Design, Automation and Test in Europe
Buffer capacity computation for throughput-constrained modal task graphs
ACM Transactions on Embedded Computing Systems (TECS)
A fast heuristic scheduling algorithm for periodic ConcurrenC models
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Correct and non-defensive glue design using abstract models
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Postscheduling buffer management trade-offs in streaming software synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Static dataflow with access patterns: semantics and analysis
Proceedings of the 49th Annual Design Automation Conference
FORMLESS: scalable utilization of embedded manycores in streaming applications
Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems
Cyclo-static DataFlow phases scheduling optimization for buffer sizes minimization
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Buffer minimization in earliest-deadline first scheduling of dataflow graphs
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Liveness evaluation of a cyclo-static DataFlow graph
Proceedings of the 50th Annual Design Automation Conference
Model checking of scenario-aware dataflow with CADP
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Modeling static-order schedules in synchronous dataflow graphs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Viewpoints, formalisms, languages, and tools for cyber-physical systems
Proceedings of the 6th International Workshop on Multi-Paradigm Modeling
Throughput-memory footprint trade-off in synthesis of streaming software on embedded multiprocessors
ACM Transactions on Embedded Computing Systems (TECS)
Journal of Systems Architecture: the EUROMICRO Journal
| Hi-index | 14.99 |
Multimedia applications usually have throughput constraints. An implementation must meet these constraints, while it minimizes resource usage and energy consumption. The compute intensive kernels of these applications are often specified as Cyclo-Static or Synchronous Dataflow Graphs. Communication between nodes in these graphs requires storage space which influences throughput. We present an exact technique to chart the Pareto space of throughput and storage trade-offs, which can be used to determine the minimal buffer space needed to execute a graph under a given throughput constraint. The feasibility of the exact technique is demonstrated with experiments on a set of realistic DSP and multimedia applications. To increase scalability of the approach, a fast approximation technique is developed that guarantees both throughput and a, tight, bound on the maximal overestimation of buffer requirements. The approximation technique allows to trade off worst-case overestimation versus run-time.