Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Software Synthesis from Dataflow Graphs
Software Synthesis from Dataflow Graphs
A stream compiler for communication-exposed architectures
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Phased scheduling of stream programs
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Proceedings of the 4th ACM international conference on Embedded software
Efficient computation of buffer capacities for cyclo-static dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs
IEEE Transactions on Computers
Versatile task assignment for heterogeneous soft dual-processor platforms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Shared buffer implementations of signal processing systems using lifetime analysis techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Postscheduling buffer management trade-offs in streaming software synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Executing synchronous dataflow graphs on a SPM-based multicore architecture
Proceedings of the 49th Annual Design Automation Conference
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Many embedded applications demand processing of a seemingly endless stream of input data in real-time. Productive development of such applications is typically carried out by synthesizing software from high-level specifications, such as data-flow graphs. In this context, we study the problem of inter-actor buffer allocation, which is a critical step during compilation of streaming applications. We argue that fine-grain analysis of buffers' spatio-temporal characteristics, as opposed to conventional live range analysis, enables dramatic improvements in buffer sharing. Improved sharing translates to reduction of the compiled binary memory footprint, which is of prime concern in many embedded systems. We transform the buffer allocation problem to two-dimensional packing using complex polygons. We develop an evolutionary packing algorithm, which readily yields buffer allocations. Experimental results show an average of over 7X and 2X improvement in total buffer size, compared to baseline and conventional live range analysis schemes, respectively.