Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Improvement in feasibility testing for real-time tasks
Real-Time Systems
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume II
Real Time Scheduling Theory: A Historical Perspective
Real-Time Systems
Proceedings of the 43rd annual Design Automation Conference
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
The partitioned dynamic-priority scheduling of sporadic task systems
Real-Time Systems
Efficient computation of buffer capacities for cyclo-static dataflow graphs
Proceedings of the 44th annual Design Automation Conference
PT-Scotch: A tool for efficient parallel graph ordering
Parallel Computing
Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs
IEEE Transactions on Computers
Symbolic Computation of Schedulability Regions Using Parametric Timed Automata
RTSS '08 Proceedings of the 2008 Real-Time Systems Symposium
Implementation of a Speedup-Optimal Global EDF Schedulability Test
ECRTS '09 Proceedings of the 2009 21st Euromicro Conference on Real-Time Systems
Improvement to Quick Processor-Demand Analysis for EDF-Scheduled Real-Time Systems
ECRTS '09 Proceedings of the 2009 21st Euromicro Conference on Real-Time Systems
Schedulability Analysis for Real-Time Systems with EDF Scheduling
IEEE Transactions on Computers
Scheduling Dependent Periodic Tasks without Synchronization Mechanisms
RTAS '10 Proceedings of the 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium
Tests for global EDF schedulability analysis
Journal of Systems Architecture: the EUROMICRO Journal
A survey of hard real-time scheduling for multiprocessor systems
ACM Computing Surveys (CSUR)
Multi-task Implementation of Multi-periodic Synchronous Programs
Discrete Event Dynamic Systems
Hard-real-time scheduling of data-dependent tasks in embedded streaming applications
EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software
IEEE Transactions on Signal Processing
Affine Data-Flow Graphs for the Synthesis of Hard Real-Time Applications
ACSD '12 Proceedings of the 2012 12th International Conference on Application of Concurrency to System Design
Robustness Analysis for Scheduling Problems Using the Inverse Method
TIME '12 Proceedings of the 2012 19th International Symposium on Temporal Representation and Reasoning
Managing latency in embedded streaming applications under hard-real-time scheduling
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Design of safety-critical Java level 1 applications using affine abstract clocks
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Design of streaming applications on MPSoCs using abstract clocks
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Design of safety-critical Java level 1 applications using affine abstract clocks
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
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Symbolic schedulability analysis of dataflow graphs is the process of synthesizing the timing parameters (i.e. periods, phases, and deadlines) of actors so that the task system is schedulable and achieves a high throughput when using a specific scheduling policy. Furthermore, the resulted schedule must ensure that communication buffers are underflow- and overflow-free. This paper describes a (partitioned) earliest-deadline first symbolic schedulability analysis of dataflow graphs that minimizes the buffering requirements. Our scheduling analysis consists of three major steps. (1) The construction of an abstract affine schedule of the graph that excludes overflow and underflow exceptions and minimizes the buffering requirements assuming some precedences between jobs. (2) Symbolic deadlines adjustment that guarantees precedences without the need for lock-based synchronizations. (3) The concretization of the affine schedule using a symbolic, fast-converging, processor-demand analysis for both uniprocessor and multiprocessor systems. Experimental results show that our technique improves the buffering requirements in many cases.