FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume II
Benefits and challenges for platform-based design
Proceedings of the 41st annual Design Automation Conference
N-synchronous Kahn networks: a relaxed model of synchrony for real-time systems
Conference record of the 33rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
The Challenges for High Performance Embedded Systems
DSD '06 Proceedings of the 9th EUROMICRO Conference on Digital System Design
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Energy efficient streaming applications with guaranteed throughput on MPSoCs
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
A MPSoC Prototyping Platform for Flexible Radio Applications
DSD '09 Proceedings of the 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools
ESL Models and their Application: Electronic System Level Design and Verification in Practice
ESL Models and their Application: Electronic System Level Design and Verification in Practice
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs
Proceedings of the Conference on Design, Automation and Test in Europe
Automated bottleneck-driven design-space exploration of media processing systems
Proceedings of the Conference on Design, Automation and Test in Europe
Automatic TLM Generation for Early Validation of Multicore Systems
IEEE Design & Test
Design of safety-critical Java level 1 applications using affine abstract clocks
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Buffer minimization in earliest-deadline first scheduling of dataflow graphs
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
| Hi-index | 0.00 |
This paper presents a cost-effective and formal approach to model and analyze streaming applications on multi-processor systems-on-chip (MPSoCs). This approach enables to address time requirements, mapping of applications on MPSoCs and system behavior correctness by using abstract clocks of synchronous languages. Compared to usual prototyping and simulation techniques, it is very fast and favors correctness-by-construction. No coding is needed to run and analyze a system, which avoids tedious debugging efforts. It is an ideal complement to existing techniques to deal with large system design spaces.