Relational Theory of Computing
Relational Theory of Computing
A Model and Methodology for Hardware-Software Codesign
IEEE Design & Test
A Hardware-Software Codesign Methodology for DSP Applications
IEEE Design & Test
Implementation-Independent Model of an Instruction Set Architecture in VHDL
IEEE Design & Test
Computer-Aided Hardware-Software Codesign
IEEE Micro
ARTS '97 Proceedings of the 4th International AMAST Workshop on Real-Time Systems and Concurrent and Distributed Software: Transformation-Based Reactive Systems Development
Abstraction of Clocks in Synchronous Data-Flow Systems
APLAS '08 Proceedings of the 6th Asian Symposium on Programming Languages and Systems
Design of safety-critical Java level 1 applications using affine abstract clocks
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Buffer minimization in earliest-deadline first scheduling of dataflow graphs
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Toward polychronous analysis and validation for timed software architectures in AADL
Proceedings of the Conference on Design, Automation and Test in Europe
Design of streaming applications on MPSoCs using abstract clocks
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Exploring system architectures in AADL via Polychrony and SynDEx
Frontiers of Computer Science: Selected Publications from Chinese Universities
Polychronous modeling, analysis, verification and simulation for timed software architectures
Journal of Systems Architecture: the EUROMICRO Journal
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In this paper we present the affine clock calculus as an extension of the formal verification techniques provided by the SIGNAL language. A SIGNAL program describes a system of clock synchronisation constraints the consistency of which is verified by compilation (clock calculus). Well-adapted in control-based system design, the clock calculus has to be extended in order to enable the validation of SIGNAL-ALPHA applications which usually contain important numerical calculations. The new affine clock calculus is based on the properties of affine relations induced between clocks by the refinement of SIGNAL-ALPHA specifications in a codesign context. Affine relations enable the derivation of a new set of synchronisability rules which represent conditions against which synchronisation constraints on clocks can be assessed. Properties of affine relations and synchronisability rules are derived in the semantical model of traces of SIGNAL. A prototype implementing a subset of the synchronisability rules has been integrated in the SIGNAL compiler and used for the validation of a video image coding application specified using SIGNAL and ALPHA.