On the development of reactive systems
Logics and models of concurrent systems
Handbook of logic in computer science (vol. 3)
Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
First version of a data flow procedure language
Programming Symposium, Proceedings Colloque sur la Programmation
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume II
MEMOCODE '03 Proceedings of the First ACM and IEEE International Conference on Formal Methods and Models for Co-Design
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Scheduling and memory requirements analysis with AADL
Proceedings of the 2005 annual ACM SIGAda international conference on Ada: The Engineering of Correct and Reliable Software for Real-Time & Distributed Systems using Ada and Related Technologies
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
From the prototype to the final embedded system using the Ocarina AADL tool suite
ACM Transactions on Embedded Computing Systems (TECS)
Formal Schedulability Analysis and Simulation for AADL
ICESS '08 Proceedings of the 2008 International Conference on Embedded Software and Systems
Synchronous Modeling and Validation of Priority Inheritance Schedulers
FASE '09 Proceedings of the 12th International Conference on Fundamental Approaches to Software Engineering: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009
Translating AADL into BIP - Application to the Verification of Real-Time Systems
Models in Software Engineering
Designing Embedded Systems with the SIGNAL Programming Language: Synchronous, Reactive Specification
Designing Embedded Systems with the SIGNAL Programming Language: Synchronous, Reactive Specification
Towards a formal semantics for the AADL behavior annex
Proceedings of the Conference on Design, Automation and Test in Europe
Schedulability analysis of AADL models
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
System-level co-simulation of integrated avionics using polychrony
Proceedings of the 2011 ACM Symposium on Applied Computing
Safety, Dependability and Performance Analysis of Extended AADL Models
The Computer Journal
Formal Refinement Checking in a System-level Design Methodology
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
Model-Based Engineering with AADL: An Introduction to the SAE Architecture Analysis & Design Language
Toward polychronous analysis and validation for timed software architectures in AADL
Proceedings of the Conference on Design, Automation and Test in Europe
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Architecture analysis & design language (AADL) has been increasingly adopted in the design of embedded systems, and corresponding scheduling and formal verification have been well studied. However, little work takes code distribution and architecture exploration into account, particularly considering clock constraints, for distributed multi-processor systems. In this paper, we present an overview of our approach to handle these concerns, together with the associated toolchain, AADL-Polychrony-SynDEx. First, in order to avoid semantic ambiguities of AADL, the polychronous/multiclock semantics of AADL, based on a polychronous model of computation, is considered. Clock synthesis is then carried out in Polychrony, which bridges the gap between the polychronous semantics and the synchronous semantics of SynDEx. The same timing semantics is always preserved in order to ensure the correctness of the transformations between different formalisms. Code distribution and corresponding scheduling is carried out on the obtained SynDEx model in the last step, which enables the exploration of architectures originally specified in AADL. Our contribution provides a fast yet efficient architecture exploration approach for the design of distributed real-time and embedded systems. An avionic case study is used here to illustrate our approach.