Programming and Verifying Real-Time Systems by Means of the Synchronous Data-Flow Language LUSTRE
IEEE Transactions on Software Engineering - Special issue: specification and analysis of real-time systems
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Verification of time partitioning in the DEOS scheduler kernel
Proceedings of the 22nd international conference on Software engineering
Priority Inheritance Protocols: An Approach to Real-Time Synchronization
IEEE Transactions on Computers
SACRES: A Step Ahead in the Development of Critical Avoinics Applications (Abstract)
HSCC '99 Proceedings of the Second International Workshop on Hybrid Systems: Computation and Control
Synchronous Modeling of Avionics Applications using the SIGNAL Language
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
Cheddar: a flexible real time scheduling framework
Proceedings of the 2004 annual ACM SIGAda international conference on Ada: The engineering of correct and reliable software for real-time & distributed systems using Ada and related technologies
Scheduling and memory requirements analysis with AADL
Proceedings of the 2005 annual ACM SIGAda international conference on Ada: The Engineering of Correct and Reliable Software for Real-Time & Distributed Systems using Ada and Related Technologies
Describing and Executing Random Reactive Systems
SEFM '06 Proceedings of the Fourth IEEE International Conference on Software Engineering and Formal Methods
International Journal on Software Tools for Technology Transfer (STTT)
Virtual execution of AADL models via a translation into synchronous programs
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
Formal analysis of the priority ceiling protocol
RTSS'10 Proceedings of the 21st IEEE conference on Real-time systems symposium
Toward polychronous analysis and validation for timed software architectures in AADL
Proceedings of the Conference on Design, Automation and Test in Europe
Exploring system architectures in AADL via Polychrony and SynDEx
Frontiers of Computer Science: Selected Publications from Chinese Universities
Polychronous modeling, analysis, verification and simulation for timed software architectures
Journal of Systems Architecture: the EUROMICRO Journal
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Architecture Description Languages (ADLs) allow embedded systems to be described as assemblies of hardware and software components. It is attractive to use such a global modelling as a basis for early system analysis. However, in such descriptions, the applicative software is often abstracted away, and is supposed to be developed in some host programming language. This forbids to take the applicative software into account in such early validation. To overcome this limitation, a solution consists in translating the ADL description into an executable model, which can be simulated and validated together with the software. In a previous paper [1], we proposed such a translation of Aadl (Architecture Analysis & Design Language) specifications into an executable synchronous model. The present paper is a continuation of this work, and deals with expressing the behavior of complex scheduling policies managing shared resources. We provide a synchronous specification for two shared resource scheduling protocols: the well-known basic priority inheritance protocol (BIP), and the priority ceiling protocol (PCP). This results in an automated translation of Aadl models into a purely Boolean synchronous (Lustre) scheduler, that can be directly model-checked, possibly with the actual software.