Prototyping of the receiver unit for a broadband access network
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Data memory minimisation for synchronous data flow graphs emulated on DSP-FPGA targets
DAC '97 Proceedings of the 34th annual Design Automation Conference
Heterogeneous modeling and simulation of embedded systems in El Greco
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
A dataflow specification for system level synthesis of 3D graphics applications
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
System canvas: a new design environment for embedded DSP and telecommunication systems
Proceedings of the ninth international symposium on Hardware/software codesign
Hardware synthesis from SPDF representation for multimedia applications
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Fractional rate dataflow model and efficient code synthesis for multimedia applications
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Dynamic response time optimization for SDF graphs
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
A stream compiler for communication-exposed architectures
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Consistency Analysis of Reconfigurable Dataflow Specifications
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Consistency analysis of reconfigurable dataflow specifications
Embedded processor design challenges
Real-time scheduling in video systems
Engineering of distributed control systems
Phased scheduling of stream programs
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems
Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Implementing DSP applications on heterogeneous targets using minimal size data buffers
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
Data Routing in Dataflow Graphs
RSP '97 Proceedings of the 8th International Workshop on Rapid System Prototyping (RSP '97) Shortening the Path from Specification to Prototype
DF*: Modeling Dynamic Process Creation and Events for Interactive Multimedia Applications
RSP '01 Proceedings of the 12th International Workshop on Rapid System Prototyping
Fractional Rate Dataflow Model for Efficient Code Synthesis
Journal of VLSI Signal Processing Systems
Hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
The CBP Parameter: A Module Characterization Approach for DSP Software Optimization
Journal of VLSI Signal Processing Systems
Combining Extended Retiming and Unfolding for Rate-Optimal Graph Transformation
Journal of VLSI Signal Processing Systems
Modeling of Block-Based DSP Systems
Journal of VLSI Signal Processing Systems
Teleport messaging for distributed stream programs
Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming
Combining extended retiming and unfolding for rate-optimal graph transformation
Journal of VLSI Signal Processing Systems
Multidimensional DSP Core Synthesis for FPGA
Journal of VLSI Signal Processing Systems
Analysis of Dataflow Programs with Interval-limited Data-rates
Journal of VLSI Signal Processing Systems
A Platform-Based Taxonomy for ESL Design
IEEE Design & Test
Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms
Journal of Systems Architecture: the EUROMICRO Journal
Efficient simulation of critical synchronous dataflow graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
Modelling run-time arbitration by latency-rate servers in dataflow graphs
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
Efficient computation of buffer capacities for cyclo-static dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Memory-optimized software synthesis from dataflow program graphs with large size data samples
EURASIP Journal on Applied Signal Processing
A SystemC-based design methodology for digital signal processing systems
EURASIP Journal on Embedded Systems
Dataflow-based mapping of computer vision algorithms onto FPGAs
EURASIP Journal on Embedded Systems
A systematic approach to design low-power video codec cores
EURASIP Journal on Embedded Systems
Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
Communication between nested loop programs via circular buffers in an embedded multiprocessor system
SCOPES '08 Proceedings of the 11th international workshop on Software & compilers for embedded systems
Optimized RTL Code Generation from Coarse-Grain Dataflow Specification for Fast HW/SW Cosynthesis
Journal of Signal Processing Systems
Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
Proceedings of the conference on Design, automation and test in Europe
Cache aware mapping of streaming applications on a multiprocessor system-on-chip
Proceedings of the conference on Design, automation and test in Europe
A generalized static data flow clustering algorithm for mpsoc scheduling of multimedia applications
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems
ACM SIGARCH Computer Architecture News
Monotonicity and run-time scheduling
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Dataflow-based implementation of model predictive control
ACC'09 Proceedings of the 2009 conference on American Control Conference
Exploring the concurrency of an MPEG RVC decoder based on dataflow program analysis
IEEE Transactions on Circuits and Systems for Video Technology
Electronic system-level synthesis methodologies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
SoC Memory Hierarchy Derivation from Dataflow Graphs
Journal of Signal Processing Systems
A mixed-mode vector-based dataflow approach for modeling and simulating LTE physical layer
Proceedings of the 47th Design Automation Conference
Integration of dataflow optimization techniques into a software radio design framework
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs
Proceedings of the Conference on Design, Automation and Test in Europe
A generalized scheduling approach for dynamic dataflow applications
Proceedings of the Conference on Design, Automation and Test in Europe
Worst-case performance analysis of synchronous dataflow scenarios
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Synchronous dataflow scenarios
ACM Transactions on Embedded Computing Systems (TECS)
Buffer capacity computation for throughput-constrained modal task graphs
ACM Transactions on Embedded Computing Systems (TECS)
Analysis of SystemC actor networks for efficient synthesis
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 16th Asia and South Pacific Design Automation Conference
LLVM-based and scalable MPEG-RVC decoder
Journal of Real-Time Image Processing
The earlier the better: a theory of timed actor interfaces
Proceedings of the 14th international conference on Hybrid systems: computation and control
Exploiting Statically Schedulable Regions in Dataflow Programs
Journal of Signal Processing Systems
Overview of the MPEG Reconfigurable Video Coding Framework
Journal of Signal Processing Systems
Modeling adaptive streaming applications with parameterized polyhedral process networks
Proceedings of the 48th Design Automation Conference
Hard-real-time scheduling of data-dependent tasks in embedded streaming applications
EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software
Topological Patterns for Scalable Representation and Analysis of Dataflow Graphs
Journal of Signal Processing Systems
ΣC: a programming model and language for embedded manycores
ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I
Rapid implementation and optimisation of DSP systems on SoPC heterogeneous platforms
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware
Journal of Signal Processing Systems
Heterogeneous design in functional DIF
Transactions on High-Performance Embedded Architectures and Compilers IV
Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications
ACM Transactions on Embedded Computing Systems (TECS)
Buffer Optimization and Dispatching Scheme for Embedded Systems with Behavioral Transparency
ACM Transactions on Design Automation of Electronic Systems (TODAES)
MPC'12 Proceedings of the 11th international conference on Mathematics of Program Construction
A low-overhead dedicated execution support for stream applications on shared-memory cmp
Proceedings of the tenth ACM international conference on Embedded software
Compositional temporal analysis model for incremental hard real-time system design
Proceedings of the tenth ACM international conference on Embedded software
A new data flow analysis model for TDM
Proceedings of the tenth ACM international conference on Embedded software
Managing latency in embedded streaming applications under hard-real-time scheduling
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Integration of Dataflow-Based Heterogeneous Multiprocessor Scheduling Techniques in GNU Radio
Journal of Signal Processing Systems
A rule-based quasi-static scheduling approach for static islands in dynamic dataflow graphs
ACM Transactions on Embedded Computing Systems (TECS)
Parameterized Scheduling of Topological Patterns in Signal Processing Dataflow Graphs
Journal of Signal Processing Systems
Design of safety-critical Java level 1 applications using affine abstract clocks
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Buffer minimization in earliest-deadline first scheduling of dataflow graphs
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Mathematical formalisms for performance evaluation of networks-on-chip
ACM Computing Surveys (CSUR)
Liveness evaluation of a cyclo-static DataFlow graph
Proceedings of the 50th Annual Design Automation Conference
Exploiting just-enough parallelism when mapping streaming applications in hard real-time systems
Proceedings of the 50th Annual Design Automation Conference
A methodology for automated design of hard-real-time embedded streaming systems
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
BPDF: a statically analyzable DataFlow model with integer and Boolean parameters
Proceedings of the Eleventh ACM International Conference on Embedded Software
Failure-Aware Task Scheduling of Synchronous Data Flow Graphs Under Real-Time Constraints
Journal of Signal Processing Systems
Hi-index | 35.68 |
We present cycle-static dataflow (CSDF), which is a new model for the specification and implementation of digital signal processing algorithms. The CSDF paradigm is an extension of synchronous dataflow that still allows for static scheduling and, thus, a very efficient implementation of an application. In comparison with synchronous dataflow, it is more versatile because it also supports algorithms with a cyclically changing, but predefined, behavior. Our examples show that this capability results in a higher degree of parallelism and, hence, a higher throughput, shorter delays, and less buffer memory. Moreover, they indicate that CSDF is essential for modelling prescheduled components, like application-specific integrated circuits. Besides introducing the CSDF paradigm, we also derive necessary and sufficient conditions for the schedulability of a CSDF graph. We present and compare two methods for checking the liveness of a graph. The first one checks the liveness of loops, and the second one constructs a single-processor schedule for one iteration of the graph. Once the schedulability is tested, a makespan optimal schedule on a multiprocessor can be constructed. We also introduce the heuristic scheduling method of our graphical rapid prototyping environment (GRAPE)