Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
In-place memory management of algebraic algorithms on application specific ICs
Journal of VLSI Signal Processing Systems - Special issue: algorithms and parallel VSLI architecture
Multirate systems and filter banks
Multirate systems and filter banks
Code generation for fixed-point DSPs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
System canvas: a new design environment for embedded DSP and telecommunication systems
Proceedings of the ninth international symposium on Hardware/software codesign
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Code Generation for Embedded Processors
Code Generation for Embedded Processors
Software Synthesis from Dataflow Graphs
Software Synthesis from Dataflow Graphs
Embedded Multiprocessors: Scheduling and Synchronization
Embedded Multiprocessors: Scheduling and Synchronization
Introduction To Automata Theory, Languages, And Computation
Introduction To Automata Theory, Languages, And Computation
Array Placement for Storage Size Reduction in Embedded Multimedia Systems
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Proceedings of the 12th international symposium on System synthesis
Lattice-based memory allocation
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Multidimensional synchronous dataflow
IEEE Transactions on Signal Processing
IEEE Transactions on Signal Processing
Shared buffer implementations of signal processing systems using lifetime analysis techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Software synthesis from the dataflow interchange format
SCOPES '05 Proceedings of the 2005 workshop on Software and compilers for embedded systems
Postscheduling buffer management trade-offs in streaming software synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
| Hi-index | 0.00 |
Memory consumption is an important metric for DSP software implementation. In this paper, we develop a module characterization technique that promotes more economical use of memory resources at the system level. Our work is developed in the context of software synthesis from signal/video/image processing applications expressed as synchronous dataflow (SDF) graphs. SDF is a restricted form of dataflow where each computational module (actor) consumes and produces a fixed number of data values (tokens) on each execution. Usually, no assumption is made about when during the execution of an actor, the tokens are actually consumed and produced; the firing of an actor is treated as an atomic event for most purposes. However, we show in this paper that it is possible to concisely and precisely capture key properties pertaining to the relative times at which tokens are produced and consumed by an actor. We show this by introducing the consumed-before-produced (CBP) parameter, which provides a general method for characterizing the token transfer of an SDF actor. Good bounds on the CBP parameter can aid an SDF compiler in performing more aggressive optimizations for reducing buffer sizes on the edges between actors. We formally define the CBP parameter; derive some useful properties of this parameter; illustrate how the value of the parameter is derived by examining in detail the multirate FIR filter, which is a fundamental actor in multirate signal processing applications; and examine CBP parameterizations for several other practical SDF actors.