ISSS '00 Proceedings of the 13th international symposium on System synthesis
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
The CBP Parameter: A Module Characterization Approach for DSP Software Optimization
Journal of VLSI Signal Processing Systems
Design for Timing Predictability
Real-Time Systems
Joint Application Mapping/Interconnect Synthesis Techniques for Embedded Chip-Scale Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
An architectural level design methodology for embedded face detection
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Communication strategies for shared-bus embedded multiprocessors
Proceedings of the 5th ACM international conference on Embedded software
Multidimensional DSP Core Synthesis for FPGA
Journal of VLSI Signal Processing Systems
Performance guarantees by simulation of process
SCOPES '05 Proceedings of the 2005 workshop on Software and compilers for embedded systems
Computation and communication refinement for multiprocessor SoC design: A system-level perspective
Proceedings of the 41st annual Design Automation Conference
Proceedings of the 43rd annual Design Automation Conference
Efficient computation of buffer capacities for multi-rate real-time systems with back-pressure
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Synthesis of an application-specific soft multiprocessor system
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Proceedings of the conference on Design, automation and test in Europe
Modelling run-time arbitration by latency-rate servers in dataflow graphs
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
Efficient computation of buffer capacities for cyclo-static dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Proceedings of the 44th annual Design Automation Conference
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Logic foundry: rapid prototyping for FPGA-based DSP systems
EURASIP Journal on Applied Signal Processing
Observations on power-efficiency trends in mobile communication devices
EURASIP Journal on Embedded Systems
Dataflow-based mapping of computer vision algorithms onto FPGAs
EURASIP Journal on Embedded Systems
A systematic approach to design low-power video codec cores
EURASIP Journal on Embedded Systems
SPRINT: a tool to generate concurrent transaction-level models from sequential code
EURASIP Journal on Applied Signal Processing
Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor
EMSOFT '07 Proceedings of the 7th ACM & IEEE international conference on Embedded software
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Analyzing composability of applications on MPSoC platforms
Journal of Systems Architecture: the EUROMICRO Journal
Multithreaded simulation for synchronous dataflow graphs
Proceedings of the 45th annual Design Automation Conference
Parametric throughput analysis of synchronous data flow graphs
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
An optimized message passing framework for parallel implementation of signal processing applications
Proceedings of the conference on Design, automation and test in Europe
Energy efficient streaming applications with guaranteed throughput on MPSoCs
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
CoMPSoC: A template for composable and predictable multi-processor system on chips
ACM Transactions on Design Automation of Electronic Systems (TODAES)
OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems
ACM SIGARCH Computer Architecture News
Throughput Constraint for Synchronous Data Flow Graphs
CPAIOR '09 Proceedings of the 6th International Conference on Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems
High-Performance Buffer Mapping to Exploit DRAM Concurrency in Multiprocessor DSP Systems
RSP '09 Proceedings of the 2009 IEEE/IFIP International Symposium on Rapid System Prototyping
Modular performance analysis of cyclic dataflow graphs
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Monotonicity and run-time scheduling
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
On compile-time evaluation of process partitioning transformations for Kahn process networks
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Reduction techniques for synchronous dataflow graphs
Proceedings of the 46th Annual Design Automation Conference
Mode grouping for more effective generalized scheduling of dynamic dataflow applications
Proceedings of the 46th Annual Design Automation Conference
Optimizing scheduling and intercluster connection for application-specific DSP processors
IEEE Transactions on Signal Processing
Synthesis algorithm for application-specific homogeneous processor networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Journal of Systems Architecture: the EUROMICRO Journal
A Low-overhead Scheduling Methodology for Fine-grained Acceleration of Signal Processing Systems
Journal of Signal Processing Systems
A tag machine based performance evaluation method for job-shop schedules
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Trace-based KPN composability analysis for mapping simultaneous applications to MPSoC platforms
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
Simultaneous budget and buffer size computation for throughput-constrained task graphs
Proceedings of the Conference on Design, Automation and Test in Europe
Retiming multi-rate DSP algorithms to meet real-time requirement
Proceedings of the Conference on Design, Automation and Test in Europe
A generalized scheduling approach for dynamic dataflow applications
Proceedings of the Conference on Design, Automation and Test in Europe
Worst-case performance analysis of synchronous dataflow scenarios
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Synchronous dataflow scenarios
ACM Transactions on Embedded Computing Systems (TECS)
Constrained global scheduling of streaming applications on MPSoCs
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Energy efficient joint scheduling and multi-core interconnect design
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
MPSoC programming using the MAPS compiler
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Design and implementation of an operating system for composable processor sharing
Microprocessors & Microsystems
Quasi-Static Scheduling of CAL Actor Networks for Reconfigurable Video Coding
Journal of Signal Processing Systems
Overview of the MPEG Reconfigurable Video Coding Framework
Journal of Signal Processing Systems
Speed-Up of gis processing using multicore architectures
ICCSA'11 Proceedings of the 2011 international conference on Computational science and its applications - Volume Part II
Analog Integrated Circuits and Signal Processing
On-chip memory architecture exploration framework for DSP processor-based embedded system on chip
ACM Transactions on Embedded Computing Systems (TECS)
Heterogeneous design in functional DIF
Transactions on High-Performance Embedded Architectures and Compilers IV
Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications
ACM Transactions on Embedded Computing Systems (TECS)
Communication-aware mapping of KPN applications onto heterogeneous MPSoCs
Proceedings of the 49th Annual Design Automation Conference
CLASSY: a clock analysis system for rapid prototyping of embedded applications on MPSoCs
Proceedings of the 15th International Workshop on Software and Compilers for Embedded Systems
Decoupled inter- and intra-application scheduling for composable and robust embedded MPSoC platforms
Proceedings of the 15th International Workshop on Software and Compilers for Embedded Systems
Compositional temporal analysis model for incremental hard real-time system design
Proceedings of the tenth ACM international conference on Embedded software
A new data flow analysis model for TDM
Proceedings of the tenth ACM international conference on Embedded software
Dataflow analysis for multiprocessor systems with non-starvation-free schedulers
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Towards performance analysis of SDFGs mapped to shared-bus architectures using model-checking
Proceedings of the Conference on Design, Automation and Test in Europe
Process-variation-aware mapping of best-effort and real-time streaming applications to MPSoCs
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
Optimizing performance analysis for synchronous dataflow graphs with shared resources
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Auto-design systematic methodology of cluster MPSoC for multiple concurrent applications
International Journal of Computer Applications in Technology
Energy-aware task mapping and scheduling for reliable embedded computing systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
Combining computation and communication optimizations in system synthesis for streaming applications
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
| Hi-index | 0.01 |
From the Publisher:This book focuses on the incorporation of interprocessor communication costs into multiprocessor scheduling decisions, modeling and analysis of multiprocessor system performance, and the application of the synchronization graph model to the development of hardware and software that can significantly reduce interprocessor communication overhead-working out details of associated algorithms with practical examples. Reviewing important research in key areas related to multiprocessor implementation for embedded systems, Embedded Multiprocessors tackles traditional problems by proposing solutions that incorporate cost models of embedded multiprocessor systems... highlights a variety of useful techniques employed in multiprocessor scheduling strategies ...examines parallel software from the perspective of signals ...identifies abstractions that work well for the joint design of embedded hardware and software ...analyzes research from related fields, including theoretical computer science, compiler design, digital communications, and VLSI signal processing ...and more.