Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Embedded Multiprocessors: Scheduling and Synchronization
Embedded Multiprocessors: Scheduling and Synchronization
Introduction to the Scheduling Problem
IEEE Design & Test
Throughput Analysis of Synchronous Data Flow Graphs
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Energy efficient streaming applications with guaranteed throughput on MPSoCs
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
System-level runtime mapping exploration of reconfigurable architectures
IPDPS '09 Proceedings of the 2009 IEEE International Symposium on Parallel&Distributed Processing
Scheduling of stream-based real-time applications for heterogeneous systems
Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
A framework for comparing models of computation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
This paper presents an abstract multi-clock oriented reasoning for the rapid prototyping of embedded applications executed on multiprocessor systems-on-chip (MPSoCs). The scheduling of applications on execution platforms composed of processors operating at various frequencies is described and analyzed with clocks. As in the static scheduling of synchronous dataflows (SDFs), requirements for admissible schedules are investigated, which come not only from expected application behavior, but also from execution platform. An algorithm is proposed to construct admissible schedules respecting identified requirements. It is then adapted to synthesize admissible schedules for adaptive system behaviors. The modeling, analysis and algorithms presented in this paper have been implemented in a prototype tool named CLASSY (standing for CLock AnalySis SYstem).