Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
A novel framework of register allocation for software pipelining
POPL '93 Proceedings of the 20th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Data memory minimisation for synchronous data flow graphs emulated on DSP-FPGA targets
DAC '97 Proceedings of the 34th annual Design Automation Conference
Shared memory implementations of synchronous dataflow specifications
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Efficient code synthesis from extended dataflow graphs for multimedia applications
Proceedings of the 39th annual Design Automation Conference
Software Synthesis from Dataflow Graphs
Software Synthesis from Dataflow Graphs
Embedded Multiprocessors: Scheduling and Synchronization
Embedded Multiprocessors: Scheduling and Synchronization
Synthesis of Embedded Software from Synchronous Dataflow Specifications
Journal of VLSI Signal Processing Systems
Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks
Journal of VLSI Signal Processing Systems
HLDVT '01 Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop (HLDVT'01)
Scheduling dynamic dataflow graphs with bounded memory using the token flow model
Scheduling dynamic dataflow graphs with bounded memory using the token flow model
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Minimising buffer requirements of synchronous dataflow graphs with model checking
Proceedings of the 42nd annual Design Automation Conference
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Throughput Analysis of Synchronous Data Flow Graphs
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Efficient computation of buffer capacities for cyclo-static dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Proceedings of the 44th annual Design Automation Conference
Reducing data-memory footprint of multimedia applications by delay redistribution
Proceedings of the 44th annual Design Automation Conference
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Journal of Systems Architecture: the EUROMICRO Journal
Multithreaded simulation for synchronous dataflow graphs
Proceedings of the 45th annual Design Automation Conference
Cache aware mapping of streaming applications on a multiprocessor system-on-chip
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Energy efficient streaming applications with guaranteed throughput on MPSoCs
EMSOFT '08 Proceedings of the 8th ACM international conference on Embedded software
Throughput-driven synthesis of embedded software for pipelined execution on multicore architectures
ACM Transactions on Embedded Computing Systems (TECS)
Scheduling optimisations for SPIN to minimise buffer requirements in synchronous data flow
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Decomposition of Task-Level Concurrency on C Programs Applied to the Design of Multiprocessor SoC
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Performance evaluation of concurrently executing parallel applications on multi-processor systems
SAMOS'09 Proceedings of the 9th international conference on Systems, architectures, modeling and simulation
Journal of Systems Architecture: the EUROMICRO Journal
Iterative probabilistic performance prediction for multi-application multiprocessor systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Custom feedback control: enabling truly scalable on-chip power management for MPSoCs
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Automated bottleneck-driven design-space exploration of media processing systems
Proceedings of the Conference on Design, Automation and Test in Europe
Model-based synthesis and optimization of static multi-rate image processing algorithms
Proceedings of the Conference on Design, Automation and Test in Europe
Exploring parallelizations of applications for MPSoC platforms using MPA
Proceedings of the Conference on Design, Automation and Test in Europe
Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures
Proceedings of the Conference on Design, Automation and Test in Europe
Analysis of SystemC actor networks for efficient synthesis
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Multithreaded Simulation for Synchronous Dataflow Graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
NoC-MPSoC performance estimation with synchronous data flow (SDF) graphs
AIS'11 Proceedings of the Second international conference on Autonomous and intelligent systems
On buffering with stochastic guarantees in resource-constrained media players
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware
Journal of Signal Processing Systems
Buffer sizing for self-timed stream programs on heterogeneous distributed memory multiprocessors
HiPEAC'10 Proceedings of the 5th international conference on High Performance Embedded Architectures and Compilers
Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications
ACM Transactions on Embedded Computing Systems (TECS)
Postscheduling buffer management trade-offs in streaming software synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Adaptive task duplication using on-line bottleneck detection for streaming applications
Proceedings of the 9th conference on Computing Frontiers
Complexity results for Weighted Timed Event Graphs
Discrete Optimization
High-performance and low-energy buffer mapping method for multiprocessor DSP systems
ACM Transactions on Embedded Computing Systems (TECS)
Buffer minimization in earliest-deadline first scheduling of dataflow graphs
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
Mathematical formalisms for performance evaluation of networks-on-chip
ACM Computing Surveys (CSUR)
Process-variation-aware mapping of best-effort and real-time streaming applications to MPSoCs
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
Analysis of multi-domain scenarios for optimized dynamic power management strategies
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Buffer occupation in wireless social networks
WASA'13 Proceedings of the 8th international conference on Wireless Algorithms, Systems, and Applications
Symmetry breaking for multi-criteria mapping and scheduling on multicores
FORMATS'13 Proceedings of the 11th international conference on Formal Modeling and Analysis of Timed Systems
Flexible filters in stream programs
ACM Transactions on Embedded Computing Systems (TECS)
Energy-aware task mapping and scheduling for reliable embedded computing systems
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
Combining computation and communication optimizations in system synthesis for streaming applications
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
A reconfigurable real-time SDRAM controller for mixed time-criticality systems
Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
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Multimedia applications usually have throughput constraints. An implementation must meet these constraints, while it minimizes resource usage and energy consumption. The compute intensive kernels of these applications are often specified as Synchronous Dataflow Graphs. Communication between nodes in these graphs requires storage space which influences throughput. We present exact techniques to chart the Pareto space of throughput and storage trade-offs, which can be used to determine the minimal storage space needed to execute a graph under a given throughput constraint. The feasibility of the approach is demonstrated with a number of examples.