Synthesis of Embedded Software from Synchronous Dataflow Specifications

  • Authors:
  • Shuvra S. Bhattacharyya;Praveen K. Murthy;Edward A. Lee

  • Affiliations:
  • Department of Electrical and Computer Engineering and Institute for Advanced Computer Studies, University of Maryland, College Park, MD 20742-5141, USA;Angeles Design Systems;Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, USA

  • Venue:
  • Journal of VLSI Signal Processing Systems
  • Year:
  • 1999

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Abstract

The implementation of software for embedded digital signalprocessing (DSP) applications is an extremely complex process. Thecomplexity arises from escalating functionality in the applications;intense time-to-market pressures; and stringent cost, power and speedconstraints. To help cope with such complexity, DSP system designershave increasingly been employing high-level, graphical designenvironments in which system specification is based on hierarchicaldataflow graphs. Consequently, a significant industry has emergedfor the development of data-flow-based DSP design environments.Leading products in this industry include SPW from Cadence, COSSAPfrom Synopsys, ADS from Hewlett Packard, and DSP Station from MentorGraphics. This paper reviews a set of algorithms for compilingdataflow programs for embedded DSP applications into efficientimplementations on programmable digital signal processors. Thealgorithms focus primarily on the minimization of code size, and theminimization of the memory required for the buffers that implementthe communication channels in the input dataflow graph. These arecritical problems because programmable digital signal processors havevery limited amounts of on-chip memory, and the speed, power, andcost penalties for using off-chip memory are often prohibitively highfor embedded applications. Furthermore, memory demands ofapplications are increasing at a significantly higher rate than therate of increase in on-chip memory capacity offered by improvedintegrated circuit technology.