Bounded scheduling of process networks
Bounded scheduling of process networks
Static scheduling algorithms for allocating directed task graphs to multiprocessors
ACM Computing Surveys (CSUR)
Embedded Multiprocessors: Scheduling and Synchronization
Embedded Multiprocessors: Scheduling and Synchronization
IEEE Transactions on Parallel and Distributed Systems
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Automatic partitioning and mapping of stream-based applications onto the Intel IXP Network processor
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
Mapping Applications to Tiled Multiprocessor Embedded Systems
ACSD '07 Proceedings of the Seventh International Conference on Application of Concurrency to System Design
A control theoretic approach to energy-efficient pipelined computation in MPSoCs
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
Proceedings of the 44th annual Design Automation Conference
Automatic buffer sizing for rate-constrained KPN applications on multiprocessor system-on-chip
HLDVT '07 Proceedings of the 2007 IEEE International High Level Design Validation and Test Workshop
Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell
SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Requirements on the execution of Kahn process networks
ESOP'03 Proceedings of the 12th European conference on Programming
Throughput modeling to evaluate process merging transformations in polyhedral process networks
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
MPSoC programming using the MAPS compiler
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Low-power adaptive pipelined MPSoCs for multimedia: an H.264 video encoder case study
Proceedings of the 48th Design Automation Conference
IEEE Transactions on Evolutionary Computation
Multiprocessor System-on-Chip (MPSoC) Technology
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A compiler infrastructure for embedded heterogeneous MPSoCs
Proceedings of the 2013 International Workshop on Programming Models and Applications for Multicores and Manycores
Mapping on multi/many-core systems: survey of current and emerging trends
Proceedings of the 50th Annual Design Automation Conference
CADSE: communication aware design space exploration for efficient run-time MPSoC management
Frontiers of Computer Science: Selected Publications from Chinese Universities
A compiler infrastructure for embedded heterogeneous MPSoCs
Parallel Computing
Hi-index | 0.00 |
Kahn Process Networks (KPNs) are a widely accepted programming model for MPSoCs. Existing KPN mapping techniques mainly focus on assigning processes to processors. However, with embedded interconnect becoming more complex, communication has started to play an equally important role to that of computation. This paper presents a new KPN mapping algorithm that addresses communication and computation jointly. The algorithm is tested on two platforms with real applications and with randomly generated KPNs. We show that the algorithm finds solutions in situations where bare process mapping fails. It also reduced the average application makespan considerably when compared to previous heuristics.