Rapid implementation and optimisation of DSP systems on SoPC heterogeneous platforms

Authors:
J. McAllister;R. Woods;D. Reilly;S. Fischaber;R. Hasson
Affiliations:
ECIT, Queens University Belfast, Belfast, UK;ECIT, Queens University Belfast, Belfast, UK;ECIT, Queens University Belfast, Belfast, UK;ECIT, Queens University Belfast, Belfast, UK;ECIT, Queens University Belfast, Belfast, UK
Venue:
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Year:
2005

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Abstract

The emergence of programmable logic devices as processing platforms for digital signal processing applications poses challenges concerning rapid implementation and high level optimization of algorithms on these platforms. This paper describes Abhainn, a rapid implementation methodology and toolsuite for translating an algorithmic expression of the system to a working implementation on a heterogeneous multiprocessor/field programmable gate array platform, or a standalone system on programmable chip solution. Two particular focuses for Abhainn are the automated but configurable realisation of inter-processor communuication fabrics, and the establishment of novel dedicated hardware component design methodologies allowing algorithm level transformation for system optimization. This paper outlines the approaches employed in both these particular instances.