Communicating sequential processes
Communicating sequential processes
Compaan: deriving process networks from Matlab for embedded signal processing architectures
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
YAPI: application modeling for signal processing systems
Proceedings of the 37th Annual Design Automation Conference
Hardware-software co-design of embedded reconfigurable architectures
Proceedings of the 37th Annual Design Automation Conference
MPEG Video Compression Standard
MPEG Video Compression Standard
Image and Video Compression Standards: Algorithms and Architectures
Image and Video Compression Standards: Algorithms and Architectures
System level design with spade: an M-JPEG case study
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
The Garp Architecture and C Compiler
Computer
Algorithmic transformation techniques for efficient exploration of alternative application instances
Proceedings of the tenth international symposium on Hardware/software codesign
Stream-Oriented FPGA Computing in the Streams-C High Level Language
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Translating affine nested-loop programs to process networks
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Adding Limited Reconfigurability to Superscalar Processors
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques
Multidimensional DSP Core Synthesis for FPGA
Journal of VLSI Signal Processing Systems
Software synthesis from the dataflow interchange format
SCOPES '05 Proceedings of the 2005 workshop on Software and compilers for embedded systems
Efficient simulation of critical synchronous dataflow graphs
Proceedings of the 43rd annual Design Automation Conference
Multi-processor system design with ESPAM
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Streamroller:: automatic synthesis of prescribed throughput accelerator pipelines
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
The Molen compiler for reconfigurable processors
ACM Transactions on Embedded Computing Systems (TECS)
Classifying interprocess communication in process network representation of nested-loop programs
ACM Transactions on Embedded Computing Systems (TECS) - SPECIAL ISSUE SCOPES 2005
Beyond single-appearance schedules: Efficient DSP software synthesis using nested procedure calls
ACM Transactions on Embedded Computing Systems (TECS) - SPECIAL ISSUE SCOPES 2005
Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms
Journal of Systems Architecture: the EUROMICRO Journal
Efficient simulation of critical synchronous dataflow graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
PeaCE: A hardware-software codesign environment for multimedia embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automatic partitioning and mapping of stream-based applications onto the Intel IXP Network processor
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
A SystemC-based design methodology for digital signal processing systems
EURASIP Journal on Embedded Systems
pn: a tool for improved derivation of process networks
EURASIP Journal on Embedded Systems
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Calibration of abstract performance models for system-level design space exploration
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
Daedalus: toward composable multimedia MP-SoC design
Proceedings of the 45th annual Design Automation Conference
An optimized message passing framework for parallel implementation of signal processing applications
Proceedings of the conference on Design, automation and test in Europe
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A platform-based design framework for joint SW/HW multiprocessor systems design
Journal of Systems Architecture: the EUROMICRO Journal
A feedback-based approach to DVFS in data-flow applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
ColSpace: towards algorithm/implementation co-optimization
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
Journal of Systems Architecture: the EUROMICRO Journal
Iterative probabilistic performance prediction for multi-application multiprocessor systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synchronous dataflow scenarios
ACM Transactions on Embedded Computing Systems (TECS)
Multithreaded Simulation for Synchronous Dataflow Graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A data parallel view on polyhedral process networks
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems
Modeling adaptive streaming applications with parameterized polyhedral process networks
Proceedings of the 48th Design Automation Conference
A middleware approach to achieving fault tolerance of Kahn process networks on networks on chips
International Journal of Reconfigurable Computing - Special issue on selected papers from the international workshop on reconfigurable communication-centric systems on chips (ReCoSoC' 2010)
Topological Patterns for Scalable Representation and Analysis of Dataflow Graphs
Journal of Signal Processing Systems
ACM SIGARCH Computer Architecture News
Rapid implementation and optimisation of DSP systems on SoPC heterogeneous platforms
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Hardware and software synthesis of heterogeneous systems from dataflow programs
Journal of Electrical and Computer Engineering - Special issue on ESL Design Methodology
A model-driven approach for software parallelization
MODELS'11 Proceedings of the 2011th international conference on Models in Software Engineering
Sequential specification of time-aware stream processing applications
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Space optimal solution for data reordering in streaming applications on NoC based MPSoC
Journal of Systems Architecture: the EUROMICRO Journal
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
Journal of Systems Architecture: the EUROMICRO Journal
Design space exploration for high-level synthesis of multi-threaded applications
Journal of Systems Architecture: the EUROMICRO Journal
ASAM: Automatic architecture synthesis and application mapping
Microprocessors & Microsystems
Design synthesis and optimization for automotive embedded systems
Proceedings of the 2014 on International symposium on physical design
Journal of Real-Time Image Processing
Efficient implementation of data flow graphs on multi-gpu clusters
Journal of Real-Time Image Processing
Hi-index | 0.00 |
New emerging embedded system platforms in the realm of high-throughput multimedia, imaging, and signal processing will consist of multiple microprocessors and reconfigurable components. One of the major problems is how to program these platforms in a systematic and automated way so as to satisfy the performance need of applications executed on these platforms.In this paper, we present our system design approach as an efficient solution to this programming problem. We show how for an application written in Matlab, a Kahn Process Network specification can automatically be derived and systematically mapped onto a target platform composed of a microprocessor and an FPGA. Furthermore, we illustrate how the mapping approach is applied on a real-life example, namely an M-JPEG encoder.