Programming in VLSI: from communicating processes to delay-insensitive circuits
Developments in concurrency and communication
Heterogeneous Simulation—Mixing Discrete-Event Models with Dataflow
Journal of VLSI Signal Processing Systems - Special issue on the rapid prototyping of application specific signal processors (RASSP) program
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
An MPEG-2 decoder case study as a driver for a system level design methodology
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Communication refinement in video systems on chip
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Communicating sequential processes
Communications of the ACM
A Comparison of Statecharts Variants
ProCoS Proceedings of the Third International Symposium Organized Jointly with the Working Group Provably Correct Systems on Formal Techniques in Real-Time and Fault-Tolerant Systems
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
PCC: a modeling technique for mixed control/data flow systems
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Proceedings of the 37th Annual Design Automation Conference
An efficient architecture model for systematic design of application-specific multiprocessor SoC
Proceedings of the conference on Design, automation and test in Europe
Exploring design space of parallel realizations: MPEG-2 decoder case study
Proceedings of the ninth international symposium on Hardware/software codesign
STARS of MPEG decoder: a case study in worst-case analysis of discrete-event systems
Proceedings of the ninth international symposium on Hardware/software codesign
A trace transformation technique for communication refinement
Proceedings of the ninth international symposium on Hardware/software codesign
A model checking project at Philips research
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
A scalable and flexible data synchronization scheme for embedded HW-SW shared-memory systems
Proceedings of the 14th international symposium on Systems synthesis
Mapping array communication onto FIFO communication - towards an implementation
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Multiprocessor mapping of process networks: a JPEG decoding case study
Proceedings of the 15th international symposium on System Synthesis
Challenges in physical chip design
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
System level design with spade: an M-JPEG case study
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
STARS in VCC: complementing simulation with worst-case analysis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A Heterogeneous Multiprocessor Architecture for Flexible Media Processing
IEEE Design & Test
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
An Overview of Methodologies and Tools in the Field of System-Level Design
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Processes, Interfaces and Platforms. Embedded Software Modeling in Metropolis
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
Functional and Performance Modeling of Concurrency in VCC
Concurrency and Hardware Design, Advances in Petri Nets
Quasi-Static Scheduling of Independent Tasksfor Reactive Systems
ICATPN '02 Proceedings of the 23rd International Conference on Applications and Theory of Petri Nets
The Cost of Communication Protocols and Coordination Languages in Embedded Systems
COORDINATION '02 Proceedings of the 5th International Conference on Coordination Models and Languages
A methodology to design programmble embedded systems: the Y-chart approach
Embedded processor design challenges
An overview of methodologies and tools in the field of system-level design
Embedded processor design challenges
Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model
Proceedings of the tenth international symposium on Hardware/software codesign
A complexity effective communication model for behavioral modeling of signal processing applications
Proceedings of the 40th annual Design Automation Conference
Automatic trace analysis for logic of constraints
Proceedings of the 40th annual Design Automation Conference
Mapping concurrent applications onto architectural platforms
Networks on chip
Deriving process networks from weakly dynamic applications in system-level design
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Task-level timing models for guaranteed performance in multiprocessor networks-on-chip
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
A software framework for efficient system-level performance evaluation of embedded systems
Proceedings of the 2003 ACM symposium on Applied computing
System Design Using Kahn Process Networks: The Compaan/Laura Approach
Proceedings of the conference on Design, automation and test in Europe - Volume 1
System Design for DSP Applications Using the MASIC Methodology
Proceedings of the conference on Design, automation and test in Europe - Volume 1
System design for DSP applications in transaction level modeling paradigm
Proceedings of the 41st annual Design Automation Conference
Automatic synthesis of system on chip multiprocessor architectures for process networks
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Design and programming of embedded multiprocessors: an interface-centric approach
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Separation of concerns: overhead in modeling and efficient simulation techniques
Proceedings of the 4th ACM international conference on Embedded software
Proceedings of the 4th ACM international conference on Embedded software
Design Space Exploration for a Wireless Protocol on a Reconfigurable Platform
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Translating affine nested-loop programs to process networks
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Compositional Memory Systems for Multimedia Communicating Tasks
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A Real-Time Streaming Memory Controller
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
A multicast inter-task communication protocol for embedded multiprocessor systems
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A structural approach to quasi-static schedulability analysis of communicating concurrent programs
Proceedings of the 5th ACM international conference on Embedded software
Synchronization of periodic clocks
Proceedings of the 5th ACM international conference on Embedded software
An overview of embedded system design education at berkeley
ACM Transactions on Embedded Computing Systems (TECS)
N-synchronous Kahn networks: a relaxed model of synchrony for real-time systems
Conference record of the 33rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Verifying LOC based functional and performance constraints
HLDVT '03 Proceedings of the Eighth IEEE International Workshop on High-Level Design Validation and Test Workshop
Embedded system education: a new paradigm for engineering schools?
ACM SIGBED Review - Special issue: The first workshop on embedded system education (WESE)
Static cache partitioning robustness analysis for embedded on-chip multi-processors
Proceedings of the 3rd conference on Computing frontiers
Compositional, efficient caches for a chip multi-processor
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Heterogeneous behavioral hierarchy for system level designs
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Computer
Performance guarantees by simulation of process
SCOPES '05 Proceedings of the 2005 workshop on Software and compilers for embedded systems
SHAPES:: a tiled scalable software hardware architecture platform for embedded systems
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
A causality interface for deadlock analysis in dataflow
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
New approach to architectural synthesis: incorporating QoS constraint
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
Verification approach of metropolis design framework for embedded systems
International Journal of Parallel Programming
Performance Evaluation of Packet Processing Architectures Using Multiclass Queuing Networks
ANSS '06 Proceedings of the 39th annual Symposium on Simulation
Exploring performance trade-offs of a JPEG decoder using the deepcompass framework
WOSP '07 Proceedings of the 6th international workshop on Software and performance
Quasi-static Scheduling for Concurrent Architectures
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Classifying interprocess communication in process network representation of nested-loop programs
ACM Transactions on Embedded Computing Systems (TECS) - SPECIAL ISSUE SCOPES 2005
PeaCE: A hardware-software codesign environment for multimedia embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Early evaluation of future consumer AV content analysis applications with PC networks
Multimedia Tools and Applications
Interactive presentation: A process splitting transformation for Kahn process networks
Proceedings of the conference on Design, automation and test in Europe
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
Modelling run-time arbitration by latency-rate servers in dataflow graphs
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
System-level design flow based on a functional reference for HW and SW
Proceedings of the 44th annual Design Automation Conference
pn: a tool for improved derivation of process networks
EURASIP Journal on Embedded Systems
SPRINT: a tool to generate concurrent transaction-level models from sequential code
EURASIP Journal on Applied Signal Processing
A framework for system-level modeling and simulation of embedded systems architectures
EURASIP Journal on Embedded Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Causality interfaces for actor networks
ACM Transactions on Embedded Computing Systems (TECS)
Simulink based hardware-software codesign flow for heterogeneous MPSoC
Proceedings of the 2007 Summer Computer Simulation Conference
Analyzing concurrency in streaming applications
Journal of Systems Architecture: the EUROMICRO Journal
Platform-based software design flow for heterogeneous MPSoC
ACM Transactions on Embedded Computing Systems (TECS)
Servo: a programming model for many-core computing
ACM SIGARCH Computer Architecture News
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
CPO semantics of timed interactive actor networks
Theoretical Computer Science
EURASIP Journal on Embedded Systems - C-Based Design of Heterogeneous Embedded Systems
Schedulability Analysis of Petri Nets Based on Structural Properties
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'06)
Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors
Transactions on High-Performance Embedded Architectures and Compilers I
A Generic Instruction Set Simulator API for Timed and Untimed Simulation and Debug of MP2-SoCs
RSP '09 Proceedings of the 2009 IEEE/IFIP International Symposium on Rapid System Prototyping
Monotonicity and run-time scheduling
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Dataflow models for shared memory access latency analysis
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
On compile-time evaluation of process partitioning transformations for Kahn process networks
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Design Trade-offs in Customized On-chip Crossbar Schedulers
Journal of Signal Processing Systems
IEEE Transactions on Circuits and Systems for Video Technology
Reinventing computing for real time
Proceedings of the 12th Monterey conference on Reliable systems on unreliable networked platforms
Requirements on the execution of Kahn process networks
ESOP'03 Proceedings of the 12th European conference on Programming
Towards multi-application workload modeling in sesame for system-level design space exploration
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
Journal of Systems Architecture: the EUROMICRO Journal
A H.264 decoder: a design style comparison case study
Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
High level H.264/AVC video encoder parallelization for multiprocessor implementation
Proceedings of the Conference on Design, Automation and Test in Europe
Analysis of SystemC actor networks for efficient synthesis
ACM Transactions on Embedded Computing Systems (TECS)
MPEG-2 decoding in a stream programming language
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Automatic SoC design flow on many-core processors: a software hardware co-design approach for FPGAs
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Static run-time mode extraction by state partitioning in synchronous process networks
Proceedings of the 14th International Workshop on Software and Compilers for Embedded Systems
Supporting reconfigurable parallel multimedia applications
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
SystemQ: a queuing-based approach to architecture performance evaluation with systemc
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
A case for visualization-integrated system-level design space exploration
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
ESL Design and Verification: A Prescription for Electronic System Level Methodology
ESL Design and Verification: A Prescription for Electronic System Level Methodology
Static analysis of run-time modes in synchronous process network
PSI'11 Proceedings of the 8th international conference on Perspectives of System Informatics
Schedulability Analysis of Petri Nets Based on Structural Properties
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'06)
Quasi-static Scheduling for Concurrent Architectures
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
A compiler infrastructure for embedded heterogeneous MPSoCs
Proceedings of the 2013 International Workshop on Programming Models and Applications for Multicores and Manycores
Space optimal solution for data reordering in streaming applications on NoC based MPSoC
Journal of Systems Architecture: the EUROMICRO Journal
A compiler infrastructure for embedded heterogeneous MPSoCs
Parallel Computing
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We present a programming interface called YAPI to model signal processing applications as process networks. The purpose of YAPI is to enable the reuse of signal processing applications and the mapping of signal processing applications onto heterogeneous systems that contain hardware and software components. To this end, YAPI separates the concerns of the application programmer, who determines the functionality of the system, and the system designer, who determines the implementation of the functionality. The proposed model of computation extends the existing model of Kahn process networks with channel selection to support non-deterministic events. We provide an efficient implementation of YAPI in the form of a C++ run-time library to execute the applications on a workstation. Subsequently, the applications are used by the system designer as input for mapping and performance analysis in the design of complex signal processing systems. We evaluate this methodology on the design of a digital video broadcast system-on-chip.