Performance prediction of parallel processing systems: the PAMELA methodology
ICS '93 Proceedings of the 7th international conference on Supercomputing
Design Automation for Embedded Systems
Bounded scheduling of process networks
Bounded scheduling of process networks
Computer architecture (2nd ed.): a quantitative approach
Computer architecture (2nd ed.): a quantitative approach
PROPHID: a data-driven multi-processor architecture for high-performance DSP
EDTC '97 Proceedings of the 1997 European conference on Design and Test
An evolutionary approach to system-level synthesis
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
An Architectural Overview of the Programmable Multimedia Processor, TM-1
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
DSP processor/compiler co-design: a quantitative approach
ISSS '96 Proceedings of the 9th international symposium on System synthesis
PHIDEO: a silicon compiler for high speed algorithms
EURO-DAC '91 Proceedings of the conference on European design automation
Cheops: a reconfigurable data-flow system for video processing
IEEE Transactions on Circuits and Systems for Video Technology
The construction of a retargetable simulator for an architecture template
Proceedings of the 6th international workshop on Hardware/software codesign
An MPEG-2 decoder case study as a driver for a system level design methodology
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Designing digital video systems: modeling and scheduling
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Communication refinement in video systems on chip
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Embedded system synthesis under memory constraints
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Journal of VLSI Signal Processing Systems - Special issue on the 1997 IEEE workshop on signal processing systems (SiPS): design and implementation
YAPI: application modeling for signal processing systems
Proceedings of the 37th Annual Design Automation Conference
Design methodology for PicoRadio networks
Proceedings of the conference on Design, automation and test in Europe
A trace transformation technique for communication refinement
Proceedings of the ninth international symposium on Hardware/software codesign
A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems
Journal of VLSI Signal Processing Systems - Special issue on signal processing systems design and implementation
Tuning of loop cache architectures to programs in embedded system design
Proceedings of the 15th international symposium on System Synthesis
Challenges and opportunities in broadband and wireless communication designs
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
System level design with spade: an M-JPEG case study
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Developing Architectural Platforms: A Disciplined Approach
IEEE Design & Test
An Overview of Methodologies and Tools in the Field of System-Level Design
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Modeling Stream-Based Applications Using the SBF Model of Computation
Journal of VLSI Signal Processing Systems
A methodology to design programmble embedded systems: the Y-chart approach
Embedded processor design challenges
Towards efficient design space exploration of heterogeneous embedded media systems
Embedded processor design challenges
An overview of methodologies and tools in the field of system-level design
Embedded processor design challenges
Synthesis of customized loop caches for core-based embedded systems
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
An IDF-based trace transformation method for communication refinement
Proceedings of the 40th annual Design Automation Conference
A strategy for determining a Jacobi specific dataflow processor
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
A software framework for efficient system-level performance evaluation of embedded systems
Proceedings of the 2003 ACM symposium on Applied computing
System Design for DSP Applications Using the MASIC Methodology
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Fast and Accurate Multiprocessor Architecture Exploration with Symbolic Programs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Design Space Exploration for a Wireless Protocol on a Reconfigurable Platform
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
Proceedings of the conference on Design, automation and test in Europe: Proceedings
System-level performance/power analysis for platform-based design of multimedia applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A SystemC-based design methodology for digital signal processing systems
EURASIP Journal on Embedded Systems
A framework for system-level modeling and simulation of embedded systems architectures
EURASIP Journal on Embedded Systems
Calibration of abstract performance models for system-level design space exploration
Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP
SystemClick: a domain-specific framework for early exploration using functional performance models
Proceedings of the 45th annual Design Automation Conference
A mapping framework for guided design space exploration of heterogeneous MP-SoCs
Proceedings of the conference on Design, automation and test in Europe
A performance-oriented hardware/software partitioning for datapath applications
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
EURASIP Journal on Embedded Systems - C-Based Design of Heterogeneous Embedded Systems
A Mapping Framework Based on Packing for Design Space Exploration of Heterogeneous MPSoCs
Journal of Signal Processing Systems
High-Level System Modeling for Rapid HW/SW Architecture Exploration
RSP '09 Proceedings of the 2009 IEEE/IFIP International Symposium on Rapid System Prototyping
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
A compositional modelling framework for exploring MPSoC systems
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Implementing a software-based 802.11 MAC on a customized platform
CCNC'09 Proceedings of the 6th IEEE Conference on Consumer Communications and Networking Conference
Electronic system-level synthesis methodologies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Mapping and performance evaluation for heterogeneous MP-SoCs via packing
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Automated bottleneck-driven design-space exploration of media processing systems
Proceedings of the Conference on Design, Automation and Test in Europe
Combined system synthesis and communication architecture exploration for MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
An analytical approach for network-on-chip performance analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Model-driven design-space exploration for embedded systems: the octopus toolset
ISoLA'10 Proceedings of the 4th international conference on Leveraging applications of formal methods, verification, and validation - Volume Part I
Mapping of applications to MPSoCs
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Symbolic design space exploration for multi-mode reconfigurable systems
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Embedded Systems Design
An optimization methodology for memory allocation and task scheduling in socs via linear programming
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Probabilistic modelling and evaluation of soft real-time embedded systems
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Transactions on High-Performance Embedded Architectures and Compilers IV
Model-Driven design-space exploration for software-intensive embedded systems
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
Predictability for timing and temperature in multiprocessor system-on-chip platforms
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
A system-level infrastructure for multidimensional MP-SoC design space co-exploration
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on ESTIMedia'10
Application Workload Modelling via Run-Time Performance Statistics
International Journal of Embedded and Real-Time Communication Systems
Expandable process networks to efficiently specify and explore task, data, and pipeline parallelism
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
Microprocessors & Microsystems
Hi-index | 0.00 |
In this paper we present an approach for quantitative analysis of application-specific dataflow architectures. The approach allows the designer to rate design alternatives in a quantitative way and therefore supports him in the design process to find better performing architectures. The context of our work is Video Signal Processing algorithms which are mapped onto weakly-programmable, coarse-grain dataflow architectures. The algorithms are represented as Kahn graphs with the functionality of the nodes being coarse-grain functions. We have implemented an architecture simulation environment that permits the definition of dataflow architectures as a composition of architecture elements, such as functional units, buffer elements and communication structures. The abstract, clock-cycle accurate simulator has been built using a multi-threading package and employs object oriented principles. This results in a configurable and efficient simulator. Algorithms can subsequently be executed on the architecture model producing quantitative information for selected performance metrics. Results are presented for the simulation of a realistic application on several dataflow architecture alternatives, showing that many different architectures can be simulated in modest time on a modern workstation.