Performance prediction of parallel processing systems: the PAMELA methodology
ICS '93 Proceedings of the 7th international conference on Supercomputing
The Chinook hardware/software co-synthesis system
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Trace-driven memory simulation: a survey
ACM Computing Surveys (CSUR)
An integrated design environment for performance and dependability analysis
DAC '97 Proceedings of the 34th annual Design Automation Conference
Dynamic communication models in embedded system co-simulation
DAC '97 Proceedings of the 34th annual Design Automation Conference
RASSP virtual prototyping of DSP systems
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
An MPEG-2 decoder case study as a driver for a system level design methodology
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
ipChinook: an integrated IP-based design framework for distributed embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Using a Programming Language for Digital System Design
IEEE Design & Test
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Top-Down Design Using Cycle Based Simulation: an MPEG A/V Decoder Example
GLS '98 Proceedings of the Great Lakes Symposium on VLSI '98
Probabilistic application modeling for system-level perfromance analysis
Proceedings of the conference on Design, automation and test in Europe
A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Towards Efficient Design Space Exploration of Heterogeneous Embedded Media Systems
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Translating Imperative Affine Nested Loop Programs into Process Networks
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
A methodology to design programmble embedded systems: the Y-chart approach
Embedded processor design challenges
Towards efficient design space exploration of heterogeneous embedded media systems
Embedded processor design challenges
Translating imperative affine nested loop programs into process networks
Embedded processor design challenges
Algorithmic transformation techniques for efficient exploration of alternative application instances
Proceedings of the tenth international symposium on Hardware/software codesign
An IDF-based trace transformation method for communication refinement
Proceedings of the 40th annual Design Automation Conference
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
A software framework for efficient system-level performance evaluation of embedded systems
Proceedings of the 2003 ACM symposium on Applied computing
Debugging HW/SW interface for MPSoC: video encoder system design case study
Proceedings of the 41st annual Design Automation Conference
Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip
Journal of VLSI Signal Processing Systems
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
A methodology to implement real-time applications onto reconfigurable circuits
The Journal of Supercomputing
Computation and communication refinement for multiprocessor SoC design: A system-level perspective
Proceedings of the 41st annual Design Automation Conference
Analytical router modeling for networks-on-chip performance analysis
Proceedings of the conference on Design, automation and test in Europe
Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC
SCOPES '07 Proceedingsof the 10th international workshop on Software & compilers for embedded systems
A framework for system-level modeling and simulation of embedded systems architectures
EURASIP Journal on Embedded Systems
Analyzing concurrency in streaming applications
Journal of Systems Architecture: the EUROMICRO Journal
EURASIP Journal on Embedded Systems - C-Based Design of Heterogeneous Embedded Systems
Decomposition of Task-Level Concurrency on C Programs Applied to the Design of Multiprocessor SoC
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A Systematic Design Space Exploration of MPSoC Based on Synchronous Data Flow Specification
Journal of Signal Processing Systems
Multiprocessor systems-on-chip synthesis using multi-objective evolutionary computation
Proceedings of the 12th annual conference on Genetic and evolutionary computation
Automatic workload generation for system-level exploration based on modified GCC compiler
Proceedings of the Conference on Design, Automation and Test in Europe
An analytical approach for network-on-chip performance analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient exploration of bus-based system-on-chip architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design methodology for multifunction vehicle bus devices
ICOSSE'06 Proceedings of the 5th WSEAS international conference on System science and simulation in engineering
Probabilistic modelling and evaluation of soft real-time embedded systems
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Transactions on High-Performance Embedded Architectures and Compilers IV
Journal of Electrical and Computer Engineering - Special issue on ESL Design Methodology
Application Workload Modelling via Run-Time Performance Statistics
International Journal of Embedded and Real-Time Communication Systems
Early-phase performance exploration of embedded systems with ABSOLUT framework
Journal of Systems Architecture: the EUROMICRO Journal
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We present a methodology for the exploration of signal processing architectures at the system level. The methodology, named SPADE, provides a means to quickly build models of architectures at an abstract level, to easily map applications, modeled as Kahn Process Networks, onto these architecture models, and to analyze the performance of the resulting system by simulation. The methodology distinguishes between applications and architectures, and uses a trace-driven simulation technique for co-simulation of application models and architecture models. As a consequence, architecture models need not be functionally complete to be used for performance analysis while data dependent behavior is still handled correctly. We have used the methodology for the exploration of architectures and mappings of an MPEG-2 video decoder application.