Reliable estimation of execution time of embedded software
Proceedings of the conference on Design, automation and test in Europe
A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems
Journal of VLSI Signal Processing Systems - Special issue on signal processing systems design and implementation
DSD '04 Proceedings of the Digital System Design, EUROMICRO Systems
High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
IEEE Design & Test
EURASIP Journal on Embedded Systems - C-Based Design of Heterogeneous Embedded Systems
Towards multi-application workload modeling in sesame for system-level design space exploration
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
White box performance analysis considering static non-preemptive software scheduling
Proceedings of the Conference on Design, Automation and Test in Europe
Application Workload Modelling via Run-Time Performance Statistics
International Journal of Embedded and Real-Time Communication Systems
Early-phase performance exploration of embedded systems with ABSOLUT framework
Journal of Systems Architecture: the EUROMICRO Journal
The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
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Future embedded system products, e.g. smart handheld mobile terminals, will accommodate a large number of applications that will partly run sequentially and independently, partly concurrently and interacting on massively parallel computing platforms. Already for systems of moderate complexity, the design space will be huge and its exploration requires that the system architect is able to quickly evaluate the performances of candidate architectures and application mappings. The mainstream evaluation technique today is the system-level performance simulation of the applications and platforms using abstracted workload and processing capacity models, respectively. These virtual system models allow fast simulation of large systems at an early phase of development with reasonable modeling effort and time. The accuracy of the performance results is dependent on how closely the models used reflect the actual system. This paper presents a compiler based technique for automatic generation of workload models for performance simulation, while exploiting an overall approach and platform performance capacity models developed previously. The resulting workload models are experimented using x264 video and JPEG encoding application examples.