A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms
Proceedings of the 47th Design Automation Conference
A synergetic operating unit on NoC layer for CMP system
International Journal of High Performance Systems Architecture
Automatic workload generation for system-level exploration based on modified GCC compiler
Proceedings of the Conference on Design, Automation and Test in Europe
MPSoC programming using the MAPS compiler
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
An efficient architectural design of hardware interface for heterogeneous multi-core system
NPC'11 Proceedings of the 8th IFIP international conference on Network and parallel computing
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Design-space exploration and runtime resource management for multicores
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors
Early-phase performance exploration of embedded systems with ABSOLUT framework
Journal of Systems Architecture: the EUROMICRO Journal
HEAP: A Highly Efficient Adaptive multi-Processor framework
Microprocessors & Microsystems
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Commercial multicore platforms offer flexibility, computational power, and energy efficiency. However, a key open issue remains: how can designers quickly and efficiently map an application onto such a platform while profiting from the potential benefits? This article presents a tool to parallelize applications for execution on embedded multicore platforms, allowing fast design space exploration.