HEAP: A Highly Efficient Adaptive multi-Processor framework

Authors:
Luciano Lavagno;Mihai T. Lazarescu;Ioannis Papaefstathiou;Andreas Brokalakis;Johan Walters;Bart Kienhuis;Florian Schäfer
Affiliations:
Department of Electronics, Politecnico di Torino, Turin, Italy;Department of Electronics, Politecnico di Torino, Turin, Italy;Synelixis Solutions Ltd., Embedded Systems Department, Chalkida, Greece;Synelixis Solutions Ltd., Embedded Systems Department, Chalkida, Greece;Compaan Design, Leiden, Netherlands;Compaan Design, Leiden, Netherlands;FSResult GmbH, Munich, Germany
Venue:
Microprocessors & Microsystems
Year:
2013

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Abstract

Writing parallel code is difficult, especially when starting from a sequential reference implementation. Our research efforts, as demonstrated in this paper, face this challenge directly by providing an innovative toolset that helps software developers profile and parallelize an existing sequential implementation, by exploiting top-level pipeline-style parallelism. The innovation of our approach is based on the facts that (a) we use both automatic and profiling-driven estimates of the available parallelism, (b) we refine those estimates using metric-driven verification techniques, and (c) we support dynamic recovery of excessively optimistic parallelization. The proposed toolset has been utilized to find an efficient parallel code organization for a number of real-world representative applications, and a version of the toolset is provided in an open-source manner.