The Unified Modeling Language user guide
The Unified Modeling Language user guide
Discrete Math
A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems
Journal of VLSI Signal Processing Systems - Special issue on signal processing systems design and implementation
System level design with spade: an M-JPEG case study
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
An Overview of Methodologies and Tools in the Field of System-Level Design
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach
Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS
Parametric Analysis of Polyhedral Iteration Spaces
ASAP '96 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
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Specification of signal processing applications in terms of executable process networks is indispensable when these applications are to be mapped on parallel running processing units. The specifications are typically not given as process networks but as imperative programs. Translating imperative programs to process networks is thus necessary. This can be done, be it that some restrictions on the imperative programs have to be imposed: they have to be affine nested loop programs.