A Clustering Approach to Explore Grain-Sizes in the Definitionof Processing Elements in Dataflow Architectures

  • Authors:

  • P. Lieverse;E. F. Deprettere;A. C. J. Kienhuis;E. A. De Kock

  • Affiliations:

  • Delft University of Technology, Department of Information Technology and Systems/Electrical Engineering, Mekelweg 4, 2628 CD Delft, The Netherlands;Delft University of Technology, Department of Information Technology and Systems/Electrical Engineering, Mekelweg 4, 2628 CD Delft, The Netherlands;Delft University of Technology, Department of Information Technology and Systems/Electrical Engineering, Mekelweg 4, 2628 CD Delft, The Netherlands;Philips Research Laboratories, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands

  • Venue:
  • Journal of VLSI Signal Processing Systems - Special issue on the 1997 IEEE workshop on signal processing systems (SiPS): design and implementation
  • Year:
  • 1999

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Abstract

We explore the area efficiency of a class of stream-baseddataflow architectures as a function of the grain-size, for a givenset of applications. We believe the grain-size is a key parameter inbalancing flexibility and efficiency of this class ofarchitectures. We apply a clustering approach on a well-defined setof applications to derive a set of processing elements of varyinggrain-sizes. The resulting architectures are compared with respectto their silicon area. For a set of twenty-one industrially relevantvideo algorithms, we determined architectures with variousgrain-sizes. The results of this exercise indicate an improvementfactor of two for the silicon area, while changing the grain-sizefrom fine-grain to coarser-grain.