VLSI array processors
Performance prediction of parallel processing systems: the PAMELA methodology
ICS '93 Proceedings of the 7th international conference on Supercomputing
Scalable parallel processor array for Jacobi-type matrix computations
Integration, the VLSI Journal - Special issue: algorithms and parallel VLSI architectures
Jacobi-Specific Processor Arrays
ASAP '96 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Compaan: deriving process networks from Matlab for embedded signal processing architectures
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
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In this paper we present a strategy for determining a dataflow processor which is intended for the execution of Jacobi algorithms which are found in the application domain of array processing and other real-lime adaptive signal processing applications. Our strategy to determine a processor for their execution is to exploit the quasi regularity property in their dependence graph representations in search for what we call the Jacobi processor. This processor emerges from an exploration iteration which takes off from a processor template and a set of Jacobi algorithms. Based on qualitative and quantitative performance analysis, both the algorithms and the processor template are restructured towards improved execution performance. To ensure the mapper is part of the emerging processor specification, the algorithm-to-processor mapping method is included in the iterative and hierarchical exploration method. Processor's hierarchy exploits properties related to regularity in the algorithm's structure, allows gentle transitions from regular to irregular levels in the algorithm hierarchy and offers different control models for the irregular structures that appear at deeper levels of the hierarchy. Transformations aiming at reducing critical paths, increasing throughput, improving mapping efficiency and minimizing control and flow overheads are essential. They include retiming, pipelining and lookahead techniques.