A fast static scheduling algorithm for DAGs on an unbounded number of processors
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
A multiobjective optimization model for exploring multiprocessor mappings of process networks
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
Proceedings of the conference on Design, automation and test in Europe: Proceedings
CellSs: a programming model for the cell BE architecture
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
Software Performance Estimation in MPSoC Design
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Mapping and performance evaluation for heterogeneous MP-SoCs via packing
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Dimensioning heterogeneous MPSoCs via parallelism analysis
Proceedings of the Conference on Design, Automation and Test in Europe
A model-driven framework for guided design space exploration
ASE '11 Proceedings of the 2011 26th IEEE/ACM International Conference on Automated Software Engineering
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When designing heterogeneous MP-SoCs designers have to take into account various objectives such as power, die size, flexibility, performance or programmability. But to be able to evaluate a given system according to these objectives, it is necessary to know how applications will behave on that system. Since time-to-market is one key factor in chip design, it is important to be able to evaluate these systems at a very early design stage. Today this is usually done with simulations in languages such as Simulink or SystemC. We will show how the behavior of such systems can be analyzed without the need for time-consuming implementations of simulation models. This enables fast evaluation and modification of a given system at a very early design stage allowing efficient pruning of the design space.