A SystemC-based design methodology for digital signal processing systems

  • Authors:

  • Christian Haubelt;Joachim Falk;Joachim Keinert;Thomas Schlichter;Martin Streubühr;Andreas Deyhle;Andreas Hadert;Jürgen Teich

  • Affiliations:

  • Hardware-Software-Co-Design, Department of Computer Sciences, Friedrich-Alexander-University of Erlangen-Nuremberg, Erlangen, Germany;Hardware-Software-Co-Design, Department of Copmuter Sciences, Friedrich-Alexander-University of Erlangen-Nuremberg, Erlangen, Germany;Hardware-Software-Co-Design, Department of Copmuter Sciences, Friedrich-Alexander-University of Erlangen-Nuremberg, Erlangen, Germany;Hardware-Software-Co-Design, Department of Copmuter Sciences, Friedrich-Alexander-University of Erlangen-Nuremberg, Erlangen, Germany;Hardware-Software-Co-Design, Department of Copmuter Sciences, Friedrich-Alexander-University of Erlangen-Nuremberg, Erlangen, Germany;Hardware-Software-Co-Design, Department of Copmuter Sciences, Friedrich-Alexander-University of Erlangen-Nuremberg, Erlangen, Germany;Hardware-Software-Co-Design, Department of Copmuter Sciences, Friedrich-Alexander-University of Erlangen-Nuremberg, Erlangen, Germany;Hardware-Software-Co-Design, Department of Copmuter Sciences, Friedrich-Alexander-University of Erlangen-Nuremberg, Erlangen, Germany

  • Venue:
  • EURASIP Journal on Embedded Systems
  • Year:
  • 2007

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Abstract

Digital signal processing algorithms are of big importance in many embedded systems. Due to complexity reasons and due to the restrictions imposed on the implementations, new design methodologies are needed. In this paper, we present a System C-based solution supporting automatic design space exploration, automatic performance evaluation, as well as automatic system generation for mixed hardware/software solutions mapped onto FPGA-based platforms. Our proposed hardware/software codesign approach is based on a System C-based library called SysteMoC that permits the expression of different models of computation well known in the domain of digital signal processing. It combines the advantages of executability and analyzability of many important models of computation that can be expressed in SysteMoC. We will use the example of an MPEG-4 decoder throughout this paper to introduce our novel methodology. Results from a five-dimensional design space exploration and from automatically mapping parts of the MPEG-4 decoder onto a Xilinx FPGA platform will demonstrate the effectiveness of our approach.