System Design with SystemC
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A SystemC-based design methodology for digital signal processing systems
EURASIP Journal on Embedded Systems
WOSP '08 Proceedings of the 7th international workshop on Software and performance
SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models
Proceedings of the 45th annual Design Automation Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Efficient high-level modeling in the networking domain
Proceedings of the Conference on Design, Automation and Test in Europe
Combined system synthesis and communication architecture exploration for MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
On confident task-accurate performance estimation
ARCS'13 Proceedings of the 26th international conference on Architecture of Computing Systems
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We propose a novel framework, called Virtual Processing Components (VPC), that permits the modeling and simulation of multiple processors running arbitrary scheduling strategies in SystemC. The granularity is given by task accuracy that guarantees a small simulation overhead.