Interactive presentation: Reliability-aware system synthesis
Proceedings of the conference on Design, automation and test in Europe
A SystemC-based design methodology for digital signal processing systems
EURASIP Journal on Embedded Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Automatic design space exploration at the system level is the task of finding optimal or close to optimal mappings for a set of applications onto an optimized architecture. Especially, finding a feasible binding of processes onto resources that permit the communications imposed by data dependencies is known to be a N P-complete task which demands the use of heuristic optimization approaches. Nearly all optimization approaches known from literature will fail in design spaces containing only a few feasible solutions. In this paper, we propose a novel approach based on the combination of Multi-Objective Evolutionary Algorithms and SAT-solvers to overcome these drawbacks. We will provide experimental results showing the efficiency of our novel methodology for synthetic and real life test cases.