Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
YAPI: application modeling for signal processing systems
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Hardware/software co-synthesis algorithms
System-level synthesis
System level design with spade: an M-JPEG case study
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Performance Analysis of Systems with Multi-Channel Communication Architectures
VLSID '00 Proceedings of the 13th International Conference on VLSI Design
Order and containment in concurrent system design
Order and containment in concurrent system design
An architectural trade capability using the Ptolemy kernel
ICASSP '96 Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 02
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In this paper we present an overview of system level design methodologies and tools. Eight tools and their underlying methodologies are analysed. We give a short description of each of them and point out some of their strengths and weaknesses. We conclude that there still is a lot of room for research on the design of embedded systems-on-a-chip, especially in the areas of mixed-level simulation, verification, and synthesis.