On the Delay-Sensitivity of Gate Networks
IEEE Transactions on Computers
Asynchronous Circuits for Low Power: A DCC Error Corrector
IEEE Design & Test
A communicating Petri net model for the design of concurrent asynchronous modules
DAC '94 Proceedings of the 31st annual Design Automation Conference
Evaluation of function blocks for asynchronous design
EURO-DAC '94 Proceedings of the conference on European design automation
Hierarchical optimization of asynchronous circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Concurrency-oriented optimization for low-power asynchronous systems
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Asynchronous interface specification, analysis and synthesis
DAC '98 Proceedings of the 35th annual Design Automation Conference
Lazy transition systems: application to timing optimization of asynchronous circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Practical advances in asynchronous design and in asynchronous/synchronous interfaces
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
YAPI: application modeling for signal processing systems
Proceedings of the 37th Annual Design Automation Conference
Delay-insensitive interface specification and synthesis
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Transformations for the synthesis and optimization of asynchronous distributed control
Proceedings of the 38th annual Design Automation Conference
Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems
Proceedings of the 39th annual Design Automation Conference
Design of asynchronous circuits by synchronous CAD tools
Proceedings of the 39th annual Design Automation Conference
Implementing asynchronous circuits using a conventional EDA tool-flow
Proceedings of the 39th annual Design Automation Conference
NULL Convention multiply and accumulate unit with conditional rounding, scaling, and saturation
Journal of Systems Architecture: the EUROMICRO Journal
An FPGA for Implementing Asynchronous Circuits
IEEE Design & Test
Developing Micropipeline Wavefront Arbiters
IEEE Design & Test
Design of Asynchronous Circuits Using Synchronous CAD Tools
IEEE Design & Test
A Group Membership Algorithm with a Practical Specification
IEEE Transactions on Parallel and Distributed Systems
Performance Analysis of Asynchronous Circuits Using Markov Chains
Concurrency and Hardware Design, Advances in Petri Nets
Programming methodology
High-level synthesis of asynchronous systems by data-driven decomposition
Proceedings of the 40th annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
Testing C-elements is not elementary
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
Sequencer circuits for VLSI programming
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
High-level test evaluation of asynchronous circuits
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
ECSTAC: a fast asynchronous microprocessor
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
High-Performance Asynchronous Pipeline Circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
General Conditions for the Decomposition of State-Holding Elements
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Dynamic Hazards and Speed Independent Delay Model
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Some Limitations to Speed-Independence in Asynchronous Circuits
ASYNC '96 Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Projection: A Synthesis Technique for Concurrent Systems
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
A Design Framework for Asynchronous/Synchronous Circuits Based on CHP to VHDL Translation
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
An Analysis of Determinacy Using a Trace-Theoretic Model of Asynchronous Circuits
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
Algorithms for the optimal state assignment of asynchronous state machines
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
Synchronous Full-Scan for Asynchronous Handshake Circuits
Journal of Electronic Testing: Theory and Applications
Concurrent computing machines and physical space-time
Mathematical Structures in Computer Science
Asynchronous Design By Conversion: Converting Synchronous Circuits into Asynchronous Ones
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Languages for system specification
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Optimization of NULL convention self-timed circuits
Integration, the VLSI Journal
A formal approach to designing delay-insensitive circuits
Distributed Computing
A 120nm low power asynchronous ADC
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 2005 joint conference on Smart objects and ambient intelligence: innovative context-aware services: usages and technologies
Speedup of NULL convention digital circuits using NULL cycle reduction
Journal of Systems Architecture: the EUROMICRO Journal
Design of a logic element for implementing an asynchronous FPGA
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Performance-driven syntax-directed synthesis of asynchronous processors
CASES '07 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems
Design automation of real-life asynchronous devices and systems
Foundations and Trends in Electronic Design Automation
Design of an FPGA logic element for implementing asynchronous NULL convention logic circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DFT techniques and automation for asynchronous NULL conventional logic circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Asynchronous data-driven circuit synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Geometry of synthesis III: resource management through type inference
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Concurrent rewriting semantics and analysis of asynchronous digital circuits
WRLA'10 Proceedings of the 8th international conference on Rewriting logic and its applications
Power reduction of asynchronous logic circuits using activity detection
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modeling and synthesis of asynchronous pipelines
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Architectural optimization for low-power nonpipelined asynchronous systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Automated design of cryptographic devices resistant to multiple side-channel attacks
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Implementation of handshake components
CSP'04 Proceedings of the 2004 international conference on Communicating Sequential Processes: the First 25 Years
Deriving two-phase modules for a multi-target hardware compiler
DCC'96 Proceedings of the 3rd international conference on Designing Correct Circuits
Fundamenta Informaticae - Application of Concurrency to System Design, the Eighth Special Issue
A fast and accurate power estimation methodology for QDI asynchronous circuits
PATMOS'07 Proceedings of the 17th international conference on Integrated Circuit and System Design: power and timing modeling, optimization and simulation
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