The design of an asynchronous microprocessor
Proceedings of the decennial Caltech conference on VLSI on Advanced research in VLSI
Programming in VLSI: from communicating processes to delay-insensitive circuits
Developments in concurrency and communication
MIPS RISC architectures
Self-timed rings and their application to division
Self-timed rings and their application to division
Communicating sequential processes
Communications of the ACM
A Discipline of Programming
Slack Elasticity in Concurrent Computing
MPC '98 Proceedings of the Mathematics of Program Construction
The Design of an Asynchronous MIPS R3000 Microprocessor
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
Scalable formal design methods for asynchronous VLSI
POPL '02 Proceedings of the 29th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Automated synthesis for asynchronous FPGAs
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
A lattice-based framework for the classification and design of asynchronous pipelines
Proceedings of the 42nd annual Design Automation Conference
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We present a process decomposition technique for the design of pipelined asynchronous circuits. The technique is simple to use, and is based on projecting a program on different sets of variables. We provide conditions under which the technique can be applied, and show how it can be used to decompose complex concurrent programs.