A 120nm low power asynchronous ADC

  • Authors:
  • E. Allier;J. Goulier;G. Sicard;A. Dezzani;E. André;M. Renaudin

  • Affiliations:
  • Concurrent Integrated Systems Group, Grenoble Cedex - France;STMicroelectronics - CR&D, Crolles Cedex - France;Concurrent Integrated Systems Group, Grenoble Cedex - France;Concurrent Integrated Systems Group, Grenoble Cedex - France;STMicroelectronics - CR&D, Crolles Cedex - France;Concurrent Integrated Systems Group, Grenoble Cedex - France

  • Venue:
  • ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
  • Year:
  • 2005

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Abstract

This paper discusses the development of a new kind of low power processing chain which dynamically adapts sampling frequency to signals. Thus, the design of an Asynchronous Analog-to-Digital Converter (A-ADC) is tackled. Its principle is based on a non-uniform sampling scheme and asynchronous technology, that allow significant activity and power savings. A test chip targetting 10-bit speech applications has been fabricated using the 120nm CMOS process from STMicroelectronics. The power consumption is lower than 180µW leading to a Figure of Merit two times better than those of classical Nyquist converters recently published