Synchronous and asynchronous A-D conversion
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Data Acquisition and Signal Processing for Smart Sensors
Data Acquisition and Signal Processing for Smart Sensors
A New Class of Asynchronous A/D Converters Based on Time Quantization
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
A 120nm low power asynchronous ADC
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
A Level-Crossing Flash Asynchronous Analog-to-Digital Converter
ASYNC '06 Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems
Designing asynchronous analog-to-digital converter with I2C interface
ETFA'09 Proceedings of the 14th IEEE international conference on Emerging technologies & factory automation
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The concept of the asynchronous Sigma-Delta analog-to-digital converter (ASD-ADC) based on the charge pump integrator is discussed in the paper. A two-level conversion scheme is utilized. The first level is accomplished by amplitude-to-pulse-width mapping in the asynchronous Sigma-Delta modulator. The other level consists in the time-to-digital conversion. The ASD-ADC belongs to a class of mean value converters since the digital outputs correspond to the mean values of the input signal in time windows of varying width. The configurations of the charge pump modulator either with bipolar, or with unipolar controlled current sources are presented. The design of the charge-pump-based modulator model using classical solutions of bipolar technology is exemplified. The input/output simulation results of the designed asynchronous Sigma-Delta modulator (ASDM) are reported. Next, the design of the time-to-digital converter, the analysis of the quantization error, and two concepts of the converter digital output interface are presented. The comparison of the minimum transmission bit rate of the serial output port(s) for both concepts is carried out. Finally, the procedure of evaluation of the ASD-ADC key design parameters for speech signal supporting a possible original input signal recovery is exemplified.